| commit | e05c67e2363215e2c26638578239c7888b4eb085 | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bmeng.cn@gmail.com> | Fri Dec 11 02:55:47 2015 -0800 |
| committer | Bin Meng <bmeng.cn@gmail.com> | Wed Jan 13 12:20:15 2016 +0800 |
| tree | 47cc287d70dcfcdee7671e4017078c73485bf0ec | |
| parent | 580ea68bf442f7c12b4f1af621c188a35751ed01 [diff] |
x86: ivybridge: Add microcode blobs for all the steppings This adds microcode blobs created from Intel FSP package for the Chief River platform. They are for all the Ivy Bridge steppings: 306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the 306a9 which is already in the U-Boot tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>