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git01.mediatek.com / filogic / uboot / 7a033e8956a2a8caca07ba6b3249aa23ba38c7d4 / arch / riscv / lib
  1. 4cf2337 riscv: resume needs to be a global by Anton Blanchard · Thu Aug 08 02:14:17 2024 +0000
  2. c3abcaa riscv: cache: Add CBO instructions by Mayuresh Chitale · Fri Aug 23 09:41:26 2024 +0000
  3. 5985ac8 riscv: add missing linefeed in error message by Heinrich Schuchardt · Thu Oct 17 20:16:49 2024 +0200
  4. 97799bc Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD" by Tom Rini · Fri Oct 11 12:23:25 2024 -0600
  5. 4cafa21 global: Rename SPL_TPL_ to PHASE_ by Simon Glass · Sun Sep 29 19:49:54 2024 -0600
  6. 86adc2e global: Rename SPL_ to XPL_ by Simon Glass · Sun Sep 29 19:49:53 2024 -0600
  7. 85ed77d arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD by Simon Glass · Sun Sep 29 19:49:46 2024 -0600
  8. e1e0cc3 efi: arm: x86: riscv: Drop crt0/relocal extra- rules by Simon Glass · Thu Sep 26 23:59:32 2024 +0200
  9. b343ee3 efi_loader: Rename and move CMD_BOOTEFI_HELLO_COMPILE by Simon Glass · Thu Sep 26 23:59:31 2024 +0200
  10. 38f0459 Merge tag 'v2024.10-rc5' into next by Tom Rini · Mon Sep 16 14:48:13 2024 -0600
  11. 99e9210 riscv: allow to enable SHOW_REGS in main U-Boot only by Heinrich Schuchardt · Sun Aug 11 13:01:03 2024 +0200
  12. e5348c7 lmb: do away with arch_lmb_reserve() by Sughosh Ganu · Mon Aug 26 17:29:30 2024 +0530
  13. 291bf9c lmb: make LMB memory map persistent and global by Sughosh Ganu · Mon Aug 26 17:29:18 2024 +0530
  14. 1f3ebfd riscv: semihosting: correct alignment by Heinrich Schuchardt · Wed Jun 19 17:22:52 2024 +0200
  15. 946c3fc riscv: add RISC-V fields to bdinfo command by Heinrich Schuchardt · Fri Jun 07 10:41:17 2024 +0200
  16. dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
  17. abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
  18. b68fc1d riscv: simplify backtrace report by Heinrich Schuchardt · Tue May 14 07:51:42 2024 +0200
  19. dee15a9 global: Make <asm/global_data.h> include <asm/u-boot.h> by Tom Rini · Tue Apr 30 20:40:48 2024 -0600
  20. 793921e Revert "Merge patch series "pxe: Allow extlinux booting without CMDLINE enabled"" by Tom Rini · Thu Apr 18 08:29:35 2024 -0600
  21. 5725dde Merge patch series "pxe: Allow extlinux booting without CMDLINE enabled" by Tom Rini · Wed Apr 10 17:06:27 2024 -0600
  22. 586138f treewide: Make arch-specific bootm code depend on BOOTM by Simon Glass · Thu Dec 14 21:19:02 2023 -0700
  23. 8a813c1 riscv: add backtrace support by Ben Dooks · Tue Sep 05 13:12:53 2023 +0100
  24. 299425d efi_loader: set IMAGE_DLLCHARACTERISTICS_NX_COMPAT by Heinrich Schuchardt · Wed Feb 14 21:43:21 2024 +0100
  25. 9bcbe84 riscv: separate .data and .text sections of EFI binaries by Heinrich Schuchardt · Thu Jan 25 09:38:15 2024 +0100
  26. 9ceda68 riscv: page align EFI binary section by Heinrich Schuchardt · Thu Jan 25 09:38:14 2024 +0100
  27. 558abfe riscv: conflicting SPDX license linker scripts by Heinrich Schuchardt · Thu Jan 25 09:38:13 2024 +0100
  28. 44876f3 riscv: cache: support cache enable in SPL stage by Zong Li · Thu Dec 14 14:09:37 2023 +0000
  29. 13692b3 Merge patch series "Complete decoupling of bootm logic from commands" by Tom Rini · Thu Dec 21 16:10:00 2023 -0500
  30. 0726d9d bootm: Adjust arguments of boot_os_fn by Simon Glass · Fri Dec 15 20:14:13 2023 -0700
  31. 34ee3ed riscv: Add a reset_cpu() function by Simon Glass · Fri Dec 15 20:14:09 2023 -0700
  32. 922eec0 riscv: andes: Fix enable register settings of PLICSW by Yu Chien Peter Lin · Thu Nov 16 20:46:12 2023 +0800
  33. 8bf50cd riscv: allow resume after exception by Heinrich Schuchardt · Tue Oct 31 14:55:51 2023 +0200
  34. ac1c3d0 riscv: Weakly define invalidate_icache_range() by Samuel Holland · Tue Oct 31 00:37:20 2023 -0500
  35. b6b9900 riscv: Remove common.h usage by Tom Rini · Thu Oct 12 19:03:59 2023 -0400
  36. 60814cb riscv: Add Zbb support for building U-Boot by Yu Chien Peter Lin · Wed Aug 09 18:49:30 2023 +0800
  37. 1a9a7a9 riscv: andes: Rearrange Andes PLICSW to single-bit-per-hart strategy by Randolph · Thu Oct 12 13:35:34 2023 +0800
  38. 19f6361 riscv: bootstage: correct bootstage_report guard by Chanho Park · Wed Sep 06 14:18:12 2023 +0900
  39. b29a747 Merge branch 'next' by Tom Rini · Mon Oct 02 10:55:44 2023 -0400
  40. bdd5f81 common: Drop linux/printk.h from common header by Simon Glass · Thu Sep 14 18:21:46 2023 -0600
  41. a7289b6 risc-v: implement DBCN write byte by Heinrich Schuchardt · Mon Sep 04 13:24:03 2023 +0200
  42. b8357c1 event: Convert existing spy records to simple by Simon Glass · Mon Aug 21 21:16:56 2023 -0600
  43. b5f0372 riscv: Rename SiFive CLINT to RISC-V ALINT by Bin Meng · Wed Jun 21 23:11:46 2023 +0800
  44. 08b8d26 riscv: clint: Update the sifive clint ipi driver to support aclint by Bin Meng · Wed Jun 21 23:11:45 2023 +0800
  45. c99c384 riscv: andes_plicsw: Fix IPI during OpenSBI invocation by Yu Chien Peter Lin · Tue Jul 04 19:13:20 2023 +0800
  46. c34de68 riscv: semihosting: replace inline assembly with assembly file by Andre Przywara · Tue Feb 07 15:21:05 2023 +0000
  47. ae7ed57 Correct SPL uses of LMB by Simon Glass · Sun Feb 05 15:40:13 2023 -0700
  48. 718e569 riscv: memcpy: check src and dst before copy by Rick Chen · Wed Jan 04 09:56:28 2023 +0800
  49. e84ab96 efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE by Heinrich Schuchardt · Fri Dec 23 02:16:03 2022 +0100
  50. c86cb4a arch/riscv: add semihosting support for RISC-V by Kautuk Consul · Wed Dec 07 17:12:35 2022 +0530
  51. 739cd6f riscv: Rename Andes PLIC to PLICSW by Yu Chien Peter Lin · Tue Oct 25 23:03:50 2022 +0800
  52. bcb208b riscv: andes_plic.c: use modified IPI scheme by Yu Chien Peter Lin · Fri Oct 14 15:00:18 2022 +0800
  53. 2e4938b dm: core: Drop ofnode_is_available() by Simon Glass · Tue Sep 06 20:27:17 2022 -0600
  54. df00afa treewide: Drop bootm_headers_t typedef by Simon Glass · Tue Sep 06 20:26:50 2022 -0600
  55. 9c4d5c1 riscv: Introduce AVAILABLE_HARTS by Rick Chen · Wed Sep 21 14:34:54 2022 +0800
  56. 7e5e029 spl: introduce SPL_XIP to config by Nikita Shubin · Fri Sep 02 11:47:39 2022 +0300
  57. 8aaae3d zynqmp: Run board_get_usable_ram_top() only on main U-Boot by Ashok Reddy Soma · Thu Jul 07 10:45:37 2022 +0200
  58. c65d29f arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED by Michal Simek · Thu Jul 07 10:47:16 2022 +0200
  59. f4b4d75 riscv: provide missing base extension functions by Heinrich Schuchardt · Thu Mar 17 07:36:14 2022 +0100
  60. fc55736 event: Convert arch_cpu_init_dm() to use events by Simon Glass · Fri Mar 04 08:43:05 2022 -0700
  61. f263479 efi_loader: fix SectionAlignment, FileAlignment by Heinrich Schuchardt · Fri Jan 14 21:40:15 2022 +0100
  62. f0106d4 riscv: revert Complete efi header for RV32/64 by Heinrich Schuchardt · Sun Jan 09 18:16:11 2022 +0100
  63. 69c681e riscv: function to retrieve SBI implementation version by Heinrich Schuchardt · Mon Oct 25 15:09:34 2021 +0200
  64. bedc439 fdtdec: Support reserved-memory flags by Thierry Reding · Fri Sep 03 15:16:21 2021 +0200
  65. 5e33691 fdtdec: Support compatible string list for reserved memory by Thierry Reding · Fri Sep 03 15:16:19 2021 +0200
  66. 85c057e image: Drop IMAGE_ENABLE_OF_LIBFDT by Simon Glass · Sat Sep 25 19:43:21 2021 -0600
  67. cc382ff sysreset: provide SBI based sysreset driver by Heinrich Schuchardt · Sun Sep 12 21:11:46 2021 +0200
  68. c7ad952 riscv: Fix setting no-map in reserved memory nodes by Samuel Holland · Sun Sep 12 11:05:47 2021 -0500
  69. 637fa28 lmb: riscv: Add arch_lmb_reserve() by Marek Vasut · Fri Sep 10 22:47:15 2021 +0200
  70. c39544c riscv: lib: implement enable_caches for sifive cache by Zong Li · Wed Sep 01 15:01:41 2021 +0800
  71. a33070c common: board_r: support enable_caches for RISC-V by Zong Li · Wed Sep 01 15:01:40 2021 +0800
  72. 79c6855 riscv: show code leading to exception by Heinrich Schuchardt · Sat Sep 04 10:36:49 2021 +0200
  73. 5629aaa efi_loader: add Linux magic to RISC-V crt0 by Heinrich Schuchardt · Fri May 28 22:24:37 2021 +0200
  74. 51744fe riscv: booti: do not force relocation if force_reloc is not set by Vitaly Wool · Tue Apr 06 10:50:16 2021 +0300
  75. b6ec26b riscv: andes_plic: Fix riscv_get_ipi() mask by Bin Meng · Tue Jun 15 13:45:57 2021 +0800
  76. 442d446 riscv: Drop USE_SPL_FIT_GENERATOR by Bin Meng · Mon May 10 20:23:41 2021 +0800
  77. 8a27fcd riscv: Fix memmove and optimise memcpy when misalign by Bin Meng · Thu May 13 16:46:17 2021 +0800
  78. ac95f46 riscv: Fix arch_fixup_fdt always failing without /chosen by Sean Anderson · Fri May 14 22:36:16 2021 -0400
  79. 614b1d8 riscv: Split SiFive CLINT support between SPL and U-Boot proper by Bin Meng · Tue May 11 20:04:12 2021 +0800
  80. 369d87a Add support for stack-protector by Joel Peshkin · Sun Apr 11 11:21:58 2021 +0200
  81. 23caf66 riscv: assembler versions of memcpy, memmove, memset by Heinrich Schuchardt · Sat Mar 27 12:37:04 2021 +0100
  82. 76eb648 riscv: simplify longjmp by Heinrich Schuchardt · Tue Mar 23 19:11:26 2021 +0100
  83. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  84. bb721de Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next by Tom Rini · Tue Jan 05 22:34:43 2021 -0500
  85. 65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
  86. dd5d79b riscv: Complete efi header for RV32/64 by Leo Yu-Chi Liang · Mon Nov 16 17:07:41 2020 +0800
  87. b68402d riscv: Fix efi header size for RV32 by Leo Yu-Chi Liang · Thu Nov 12 10:09:52 2020 +0800
  88. fa36696 riscv: Fix efi header for RV32 by Atish Patra · Tue Oct 13 12:23:31 2020 -0700
  89. b881ba8 riscv: reset after crash by Heinrich Schuchardt · Wed Dec 02 14:36:26 2020 +0100
  90. 52a1db7 riscv: Move timer portions of SiFive CLINT to drivers/timer by Sean Anderson · Sun Oct 25 21:46:58 2020 -0400
  91. 5abf1f3 riscv: Move Andes PLMT driver to drivers/timer by Sean Anderson · Sun Oct 25 21:46:56 2020 -0400
  92. 947fc2d timer: Return count from timer_ops.get_count by Sean Anderson · Wed Oct 07 14:37:44 2020 -0400
  93. 38ae92e Merge branch 'next' by Tom Rini · Mon Oct 05 13:05:46 2020 -0400
  94. 2c4c7d1 riscv: Ensure gp is NULL or points to valid data by Sean Anderson · Mon Sep 21 07:51:40 2020 -0400
  95. ff184fe riscv: Use a valid bit to ignore already-pending IPIs by Sean Anderson · Mon Sep 21 07:51:37 2020 -0400
  96. cfb0809 riscv: Match memory barriers between send_ipi_many and handle_ipi by Sean Anderson · Mon Sep 21 07:51:36 2020 -0400
  97. 272ab20 riscv: Rework Sifive CLINT as UCLASS_TIMER driver by Sean Anderson · Mon Sep 28 10:52:26 2020 -0400
  98. 28bfc32 riscv: Clean up initialization in Andes PLIC by Sean Anderson · Mon Sep 28 10:52:25 2020 -0400
  99. 87e6ce5 riscv: Rework Andes PLMT as a UCLASS_TIMER driver by Sean Anderson · Mon Sep 28 10:52:24 2020 -0400
  100. 9baaaef riscv: Rework riscv timer driver to only support S-mode by Sean Anderson · Mon Sep 28 10:52:21 2020 -0400