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git01.mediatek.com / filogic / uboot / 79591ca1ecbd32e59e76ced0661ec16d75a0ecb5 / arch / arm / mach-tegra / tegra124 / clock.c
  1. a1dfa9a ARM: tegra124: Clear IDDQ when enabling PLLC by Thierry Reding · Tue Sep 08 11:38:03 2015 +0200
  2. 4c3aaa7 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · Thu Aug 20 11:42:20 2015 +0200
  3. 366b24f of: clean up OF_CONTROL ifdef conditionals by Masahiro Yamada · Wed Aug 12 07:31:55 2015 +0900
  4. b6ba3fb tegra: Correct logic for reading pll_misc in clock_start_pll() by Simon Glass · Mon Aug 10 07:14:36 2015 -0600
  5. a8480ef Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · Thu Jun 25 09:50:44 2015 -0700
  6. 75b1c23 tegra: Add missing tegra124 peripherals by Simon Glass · Fri Jun 05 14:39:39 2015 -0600
  7. 93a1995 tegra124: clock: Add display clocks and functions by Simon Glass · Tue Apr 14 21:03:34 2015 -0600
  8. ed1632a ARM: tegra: collect SoC sources into mach-tegra by Masahiro Yamada · Fri Feb 20 17:04:04 2015 +0900[Renamed from arch/arm/cpu/tegra124-common/clock.c]
  9. 4bf9869 ARM: tegra: Implement tegra_plle_enable() by Thierry Reding · Tue Dec 09 22:25:06 2014 -0700
  10. 8981bff ARM: tegra: Add CPU (armv7) files for Tegra124 by Tom Warren · Fri Jan 24 12:46:15 2014 -0700