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git01.mediatek.com / filogic / uboot / 5a40c5154debd4870a6dff88b540602227361166 / drivers / clk / rockchip / clk_rk3399.c
  1. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  2. 783acfd arm: rockchip: Add common cru.h by Jagan Teki · Thu Jan 09 14:22:17 2020 +0530
  3. 416f8d3 rockchip: clk: fix wrong CONFIG_IS_ENABLED handling by Heiko Stuebner · Sat Nov 09 00:06:30 2019 +0100
  4. c312c10 rockchip: clk: rk3399: remove clk_enable() by Kever Yang · Wed Aug 28 16:23:51 2019 +0800
  5. f0b0631 clk: rockchip: rk3399: Set 400MHz ddr clock by Jagan Teki · Tue Jul 16 17:27:36 2019 +0530
  6. 4833f32 clk: rockchip: rk3399: Set 50MHz ddr clock by Jagan Teki · Tue Jul 16 17:27:35 2019 +0530
  7. bef02a3 clk: rockchip: rk3399: Fix check patch warnings and checks by Jagan Teki · Mon Jul 15 23:51:10 2019 +0530
  8. ae58935 rockchip: clk: rk3399: handle clk_enable requests for USB3 by Mark Kettenis · Sun Jun 30 18:01:53 2019 +0200
  9. e5607a0 rockchip: clk: rk3399: allow requests for all UART clocks by Christoph Muellner · Tue May 07 10:58:44 2019 +0200
  10. 9fbe17c rockchip: use 'arch-rockchip' as header file path by Kever Yang · Thu Mar 28 11:01:23 2019 +0800
  11. d27b317 rockchip: clk: Add mention of four new clocks by Simon Glass · Mon Jan 21 14:53:30 2019 -0700
  12. 25c7ba9 rockchip: rk3399: Initialize CPU B clock. by Christoph Muellner · Fri Nov 30 20:32:48 2018 +0100
  13. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  14. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  15. 932908c rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL by Philipp Tomsich · Fri Feb 23 17:36:41 2018 +0100
  16. 0b3cd54 rockchip: clk: rk3399: handle clk_enable requests for GMAC by Philipp Tomsich · Fri Feb 16 16:07:24 2018 +0100
  17. 6dd2fb4 rockchip: clk: guard set_parent implementations against OF_PLATDATA by Philipp Tomsich · Thu Jan 25 15:27:10 2018 +0100
  18. 2d20a63 rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-node by Philipp Tomsich · Mon Jan 08 14:00:27 2018 +0100
  19. f4ba6ed rockchip: clk: rk3399: implement set_parent() operation by Philipp Tomsich · Mon Jan 08 13:11:01 2018 +0100
  20. 432976f rockchip: clk: bind reset driver by Elaine Zhang · Tue Dec 19 18:22:38 2017 +0800
  21. 8a4868f rockchip: clk: rk3399: change extract_bits to bitfield_extract by Philipp Tomsich · Wed Nov 22 19:45:04 2017 +0100
  22. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  23. 05a14b0 rockchip: rk3399: init CPU clock when rkclk_init() by Kever Yang · Thu Oct 12 15:27:29 2017 +0800
  24. 81e1042 treewide: replace with error() with pr_err() by Masahiro Yamada · Sat Sep 16 14:10:41 2017 +0900
  25. f91b9b4 rockchip: clk: Add rk3399 SARADC clock support by David Wu · Wed Sep 20 14:38:58 2017 +0800
  26. 44d7684 rockchip: clk: rk3399: Convert to livetree by Philipp Tomsich · Tue Sep 12 17:32:24 2017 +0200
  27. 62332c1 rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1 by Philipp Tomsich · Tue Sep 12 17:30:56 2017 +0200
  28. 1b1fe41 dtoc: Add support for 32 or 64-bit addresses by Simon Glass · Tue Aug 29 14:15:50 2017 -0600
  29. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  30. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  31. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  32. 10b594b rockchip: clk: rk3399: allow requests for HDMI clocks by Philipp Tomsich · Fri Apr 28 18:33:57 2017 +0200
  33. d10b45e rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS by Philipp Tomsich · Fri Apr 28 17:11:55 2017 +0200
  34. 78a7314 rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS by Philipp Tomsich · Tue Apr 25 09:52:06 2017 +0200
  35. 30d7c15 rockchip: clk: rk3399: fix off-by one during rate calculation in i2c/spi_set_rate by Philipp Tomsich · Thu Apr 20 22:05:50 2017 +0200
  36. c31ee92 rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5 by Philipp Tomsich · Thu Apr 20 22:05:49 2017 +0200
  37. 775bc39 rockchip: clk: rk3399: 24MHz is not a power of 2 by Philipp Tomsich · Fri Mar 24 19:35:37 2017 +0100
  38. bfa896c rockchip: clk: rk3399: add clocking support for Ethernet by Philipp Tomsich · Fri Mar 24 19:24:25 2017 +0100
  39. cf0a4ba rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL by Philipp Tomsich · Fri Mar 24 19:24:24 2017 +0100
  40. e198053 rockchip: clk: rk3399: update driver for spl by Kever Yang · Mon Feb 13 17:38:56 2017 +0800
  41. d1dfea7 rockchip: rk3399: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:51 2016 -0600
  42. 78b6c3f clk: rk3399: fix rockchip_get_cru by Jacob Chen · Tue Sep 27 15:48:45 2016 +0800
  43. e54d26a clk: rk3399: add pmucru controller support by Kever Yang · Fri Aug 12 17:47:15 2016 +0800
  44. dc850de clock: rk3399: add support for dwmmc 400K by Kever Yang · Thu Aug 04 11:44:58 2016 +0800
  45. 4776f0b move: rockchip: move clock drivers into a subdirectory by Heiko Stübner · Fri Jul 29 14:47:21 2016 +0200[Renamed from drivers/clk/clk_rk3399.c]
  46. ca19eac rk3399: add basic soc driver by Kever Yang · Fri Jul 29 10:35:25 2016 +0800