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git01.mediatek.com / filogic / uboot / 4cac2e06d29cf819dc2b7b6d74461df0ea346921 / drivers / clk / mediatek
  1. 90e8302 Merge patch series "clk: mediatek: mt7622: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:15:47 2024 -0600
  2. 24f10ca clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock by Christian Marangi · Sat Aug 03 10:43:25 2024 +0200
  3. 66b75e4 clk: mediatek: mt7622: add missing clock PERI_UART4_PD by Christian Marangi · Sat Aug 03 10:43:24 2024 +0200
  4. 10bf15f clk: mediatek: mt7622: add missing clock MUX1_SEL by Christian Marangi · Sat Aug 03 10:43:23 2024 +0200
  5. 5ef8a21 clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN by Christian Marangi · Sat Aug 03 10:43:22 2024 +0200
  6. 614ae87 clk: mediatek: mt7622: move INFRA_TRNG to the bottom by Christian Marangi · Sat Aug 03 10:43:21 2024 +0200
  7. 20cefbc clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents by Christian Marangi · Sat Aug 03 10:43:19 2024 +0200
  8. 15e3742 Merge patch series "clk: mediatek: mt7986: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:15:13 2024 -0600
  9. 07603e4 clk: mediatek: mt7986: rename CK to CLK by Christian Marangi · Sat Aug 03 10:40:48 2024 +0200
  10. bf79ce0 clk: mediatek: mt7986: convert to unified infracfg gates + muxes by Christian Marangi · Sat Aug 03 10:40:47 2024 +0200
  11. 61c9220 clk: mediatek: mt7986: replace infracfg ID with upstream linux by Christian Marangi · Sat Aug 03 10:40:46 2024 +0200
  12. 6698b4d clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list by Christian Marangi · Sat Aug 03 10:40:45 2024 +0200
  13. efc33e4 clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used by Christian Marangi · Sat Aug 03 10:40:44 2024 +0200
  14. 0fc50e7 clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:40:43 2024 +0200
  15. 83b17ec clk: mediatek: mt7986: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:40:42 2024 +0200
  16. 9276f07 clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:40:41 2024 +0200
  17. 30c4b86 clk: mediatek: mt7986: fix typo for infra_i2c0_ck by Christian Marangi · Sat Aug 03 10:40:40 2024 +0200
  18. 6a89a38 clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate by Christian Marangi · Sat Aug 03 10:40:39 2024 +0200
  19. ab4de13 clk: mediatek: mt7986: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:40:38 2024 +0200
  20. 76052a2 clk: mediatek: mt7986: fix wrong parent for INFRA_ADC_26M_CK by Christian Marangi · Sat Aug 03 10:40:37 2024 +0200
  21. 7739a5f clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2 by Christian Marangi · Sat Aug 03 10:40:36 2024 +0200
  22. 0178c61 clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:40:35 2024 +0200
  23. d349194 clk: mediatek: mt7986: fix wrong shift for PCIe clocks by Christian Marangi · Sat Aug 03 10:40:34 2024 +0200
  24. c7e9c37 Merge patch series "clk: mediatek: mt7988: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:14:29 2024 -0600
  25. e4bfc44 clk: mediatek: mt7988: rename CK to CLK by Christian Marangi · Sat Aug 03 10:33:02 2024 +0200
  26. 826afb7 clk: mediatek: mt7988: convert to unified infracfg gates + muxes by Christian Marangi · Sat Aug 03 10:33:01 2024 +0200
  27. 54894b3 clk: mediatek: mt7988: replace clock ID with upstream linux by Christian Marangi · Sat Aug 03 10:33:00 2024 +0200
  28. dee002c clk: mediatek: mt7988: comment out infracfg clk not defined by Christian Marangi · Sat Aug 03 10:32:59 2024 +0200
  29. 245c850 clk: mediatek: mt7988: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:32:58 2024 +0200
  30. ecf47ee clk: mediatek: mt7988: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:32:57 2024 +0200
  31. 532f979 clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:32:56 2024 +0200
  32. d1f073e clk: mediatek: mt7988: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:32:55 2024 +0200
  33. 70bc4e4 clk: mediatek: mt7988: fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2 by Christian Marangi · Sat Aug 03 10:32:54 2024 +0200
  34. 82a4ce2 clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at top by Christian Marangi · Sat Aug 03 10:32:53 2024 +0200
  35. fb43efd clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SEL by Christian Marangi · Sat Aug 03 10:32:52 2024 +0200
  36. 6db498a clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SEL by Christian Marangi · Sat Aug 03 10:32:51 2024 +0200
  37. 2861be6 clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:32:50 2024 +0200
  38. a662e1e Merge patch series "clk: mediatek: mt7981: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:13:51 2024 -0600
  39. f245164 clk: mediatek: mt7981: rename CK to CLK by Christian Marangi · Fri Aug 02 15:53:15 2024 +0200
  40. 9435d81 clk: mediatek: mt7981: convert to unified infracfg gates + muxes by Christian Marangi · Fri Aug 02 15:53:14 2024 +0200
  41. 8199eeb clk: mediatek: mt7981: fix support for pwm3 clock by Christian Marangi · Fri Aug 02 15:53:13 2024 +0200
  42. 8247bfd clk: mediatek: mt7981: replace infracfg ID with upstream linux by Christian Marangi · Fri Aug 02 15:53:12 2024 +0200
  43. bc63482 clk: mediatek: mt7981: drop 1/1 spurious factor by Christian Marangi · Fri Aug 02 15:53:11 2024 +0200
  44. be9dbee clk: mediatek: mt7981: implement sgmii0/1 clock by Christian Marangi · Fri Aug 02 15:53:10 2024 +0200
  45. 52726b5 clk: mediatek: mt7981: fix wrong parent list for INFRA_PWM1_SEL mux by Christian Marangi · Fri Aug 02 15:53:09 2024 +0200
  46. f8117ac clk: mediatek: mt7981: fix wrong parent for TOP_FAUD clock by Christian Marangi · Fri Aug 02 15:53:08 2024 +0200
  47. 046faee clk: mediatek: mt7981: fix wrong mux width for pwm2 and pwm1 clock by Christian Marangi · Fri Aug 02 15:53:04 2024 +0200
  48. 4fd1445 clk: mediatek: mt7981: fix typo for infra_i2c0_ck by Christian Marangi · Fri Aug 02 15:53:03 2024 +0200
  49. 14077e7 clk: mediatek: mt7981: add missing clock for infra_ipcie_pipe by Christian Marangi · Fri Aug 02 15:53:02 2024 +0200
  50. 7f9cceb clk: mediatek: mt7623: remap peri clock ID and add MUX by Christian Marangi · Fri Aug 02 15:45:05 2024 +0200
  51. b6ea620 clk: mediatek: mt7623: remap apmixedsys clock ID by Christian Marangi · Fri Aug 02 15:45:04 2024 +0200
  52. e80ebc8 clk: mediatek: mt7623: define id_offs_map and import clk ID from upstream by Christian Marangi · Fri Aug 02 15:45:03 2024 +0200
  53. 326ab20 clk: mediatek: mt7623: split clk tree to dedicated topckgen and apmixed by Christian Marangi · Fri Aug 02 15:45:02 2024 +0200
  54. 87b96c3 clk: mediatek: mt7623: fix broken peri_cgs clk with XTAL parents by Christian Marangi · Fri Aug 02 15:45:01 2024 +0200
  55. a4a0c6e Merge patch series "clk: mediatek: add OPs to support OF_UPSTREAM" by Tom Rini · Thu Aug 01 15:32:54 2024 -0600
  56. 3c2ae7d clk: mediatek: add support for APMIXED parent in infra MUX by Christian Marangi · Fri Jun 28 19:40:57 2024 +0200
  57. 475d00f clk: mediatek: add support for GATEs for APMIXED OPs by Christian Marangi · Fri Jun 28 19:40:56 2024 +0200
  58. c05ebe6 clk: mediatek: implement MUX_FLAGS and MUX_MIXED_FLAGS macro by Christian Marangi · Fri Jun 28 19:40:55 2024 +0200
  59. 29771ad clk: mediatek: add support for remapping clock ID by Christian Marangi · Fri Jun 28 19:40:54 2024 +0200
  60. e03d080 clk: mediatek: provide common clk init function for infrasys by Christian Marangi · Fri Jun 28 19:40:53 2024 +0200
  61. 56dc7cd clk: mediatek: add support for gate clock to reference topckgen clock by Christian Marangi · Fri Jun 28 19:40:52 2024 +0200
  62. 1bde149 clk: mediatek: add support for parent mux from different source for topckgen by Christian Marangi · Fri Jun 28 19:40:51 2024 +0200
  63. a4143eb clk: mediatek: add support for parent mux from different source by Christian Marangi · Fri Jun 28 19:40:50 2024 +0200
  64. 8f5b30c clk: mediatek: add support for gate ID at offset by Christian Marangi · Fri Jun 28 19:40:49 2024 +0200
  65. baa244c clk: mediatek: add support for gates in clk_tree for infrasys by Christian Marangi · Fri Jun 28 19:40:48 2024 +0200
  66. 358415a clk: mediatek: return XTAL rate for infrasys get_mux_rate by Christian Marangi · Fri Jun 28 19:40:47 2024 +0200
  67. 16f5f3f clk: mediatek: return XTAL rate directly for gates with XTAL parent by Christian Marangi · Fri Jun 28 19:40:46 2024 +0200
  68. 4dd4a28 clk: mediatek: mt7986: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:40 2024 +0200
  69. b25423f clk: mediatek: mt7988: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:39 2024 +0200
  70. 8cba8f0 clk: mediatek: mt7981: support alternative compatible for fixed-plls by Christian Marangi · Mon Jun 24 23:03:35 2024 +0200
  71. dec7ea0 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" by Tom Rini · Mon May 20 13:35:03 2024 -0600
  72. abb9a04 Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" by Tom Rini · Sat May 18 20:20:43 2024 -0600
  73. 32fa621 clk: Remove <common.h> and add needed includes by Tom Rini · Wed May 01 19:30:36 2024 -0600
  74. e9e0fee clk: mediatek: add clock driver support for MediaTek MT8365 SoC by Julien Masson · Mon Dec 04 11:48:52 2023 +0100
  75. d27e302 clk: mediatek: add clock driver support for MediaTek MT7988 SoC by developer · Wed Jul 19 17:16:28 2023 +0800
  76. 79128da clk: mediatek: add clock driver support for MediaTek MT7981 SoC by developer · Fri Sep 09 20:00:12 2022 +0800
  77. 37161fe clk: mediatek: add clock driver support for MediaTek MT7986 SoC by developer · Fri Sep 09 20:00:09 2022 +0800
  78. f724f11 clk: mediatek: add CLK_XTAL support for clock driver by developer · Fri Sep 09 20:00:07 2022 +0800
  79. ad5b075 clk: mediatek: add infrasys clock mux support by developer · Fri Sep 09 20:00:04 2022 +0800
  80. fd47f76 clk: mediatek: add support to configure clock driver parent by developer · Fri Sep 09 20:00:01 2022 +0800
  81. 2dc4caa clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock parent of xtal clock by developer · Fri Sep 09 19:59:59 2022 +0800
  82. 4b1c515 clk: mediatek: Add MT8183 clock driver by Fabien Parent · Sat Oct 17 12:52:15 2020 +0200
  83. 65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
  84. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  85. e51b57a clk: mt7622: add needed clocks for ssusb-node by Frank Wunderlich · Thu Aug 20 16:37:55 2020 +0200
  86. cee08a1 reset: drop unnecessary comment for pciesys by Frank Wunderlich · Thu Aug 20 16:37:53 2020 +0200
  87. 8bdcb39 reset: add basic reset controller for pciesys by Frank Wunderlich · Thu Aug 13 10:20:46 2020 +0200
  88. 420e8bf clk: mediatek: add pciesys support for MT7622 SoC by developer · Mon Aug 10 16:17:08 2020 +0800
  89. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  90. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · Sun May 10 11:40:11 2020 -0600
  91. 0f2af88 common: Drop log.h from common header by Simon Glass · Sun May 10 11:40:05 2020 -0600
  92. 94fc842 clk: mediatek: use unsigned type for returning the clk rate by Fabien Parent · Thu Oct 17 21:02:05 2019 +0200
  93. 65da8e7 clk: mediatek: fix clock-rate overflow problem by developer · Fri Jan 10 16:30:30 2020 +0800
  94. dea5651 clk: mediatek: add driver for MT7622 by developer · Fri Jan 10 16:30:29 2020 +0800
  95. ef45feb clk: mediatek: mt7629: add support for ssusbsys by developer · Thu Jan 09 11:35:04 2020 +0800
  96. 0b5e5f1 clk: mediatek: add configurable pcw_chg_reg/ibits/fmin to mtk_pll by developer · Tue Dec 31 11:29:22 2019 +0800
  97. ba560c7 clk: mediatek: add set_clr_upd mux type flow by developer · Tue Dec 31 11:29:21 2019 +0800
  98. 4a79703 clk: mediatek: add driver support for MT8512 by developer · Tue Dec 31 11:29:20 2019 +0800
  99. 5817d5c clk: mediatek: add driver for MT8518 by developer · Thu Nov 07 19:28:41 2019 +0800
  100. a588d15 clk: MediaTek: add hifsys entry for MT7623 SoC. by developer · Mon Jul 29 22:17:48 2019 +0800