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git01.mediatek.com
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filogic
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uboot
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47af53c6bd0134a21e37a942134a0f940ddf2fec
/
drivers
/
clk
/
rockchip
/
clk_rk3399.c
7d20cf9
arm: rockchip: rk3399: Program PLL clock for DDR at 50 MHz in documented range
by Xavier Drudis Ferran
· Sat Jul 16 12:31:45 2022 +0200
8478944
clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000
by Michal Suchanek
· Sun Aug 21 09:17:24 2022 +0200
6d70ba0
treewide: Try to avoid the preprocessor with OF_REAL
by Simon Glass
· Sat Aug 07 07:24:06 2021 -0600
9288265
treewide: Use OF_REAL instead of !OF_PLATDATA
by Simon Glass
· Sat Aug 07 07:24:04 2021 -0600
3580f6d
treewide: Simply conditions with the new OF_REAL
by Simon Glass
· Sat Aug 07 07:24:03 2021 -0600
3ba929a
common: Drop asm/global_data.h from common header
by Simon Glass
· Fri Oct 30 21:38:53 2020 -0600
9558862
dm: Use access methods for dev/uclass private data
by Simon Glass
· Tue Dec 22 19:30:28 2020 -0700
aad29ae
dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
by Simon Glass
· Thu Dec 03 16:55:21 2020 -0700
fa20e93
dm: treewide: Rename dev_get_platdata() to dev_get_plat()
by Simon Glass
· Thu Dec 03 16:55:20 2020 -0700
71fa5b4
dm: treewide: Rename 'platdata' variables to just 'plat'
by Simon Glass
· Thu Dec 03 16:55:18 2020 -0700
8a2b47f
dm: treewide: Rename auto_alloc_size members to be shorter
by Simon Glass
· Thu Dec 03 16:55:17 2020 -0700
66327ce
rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run
by Alper Nebi Yasak
· Wed Oct 28 00:15:10 2020 +0300
cf64893
Merge tag 'u-boot-rockchip-20201031' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
by Tom Rini
· Fri Oct 30 22:55:16 2020 -0400
4ef38ce
clk: rockchip: rk3399: implement getting wdt/alive clocks
by Jack Mitchell
· Thu Sep 17 10:42:06 2020 +0100
5de2f33
treewide: Fix wrong CONFIG_IS_ENABLED() handling
by Alper Nebi Yasak
· Mon Oct 05 09:57:29 2020 +0300
055c218
clk: rk3399: Enable/Disable TCPHY clocks
by Jagan Teki
· Tue May 26 11:32:07 2020 +0800
4fb2c6d
clk: rk3399: Set empty for TCPHY assigned-clocks
by Jagan Teki
· Tue May 26 11:32:06 2020 +0800
a591537
clk: rk3399: Enable/Disable the USB2PHY clk
by Jagan Teki
· Tue May 26 11:32:05 2020 +0800
ad38600
clk: rk3399: Fix eMMC get_clk reg offset
by Jagan Teki
· Sun May 24 22:13:15 2020 +0530
70c54ee
clk: rk3399: Enable/Disable the PCIEPHY clk
by Jagan Teki
· Sat May 09 22:26:20 2020 +0530
6c7f14a
clk: rk3399: Add enable/disable clks
by Jagan Teki
· Sat May 09 22:26:19 2020 +0530
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
dbd7954
common: Drop linux/delay.h from common header
by Simon Glass
· Sun May 10 11:40:11 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
3f26bce
clk: rk3399: Set empty for HCLK_SD assigned-clocks
by Jagan Teki
· Tue Apr 28 15:30:16 2020 +0530
99f0f82
clk: rk3399: Set empty for vopl assigned-clocks
by Jagan Teki
· Thu Apr 02 17:11:21 2020 +0530
9bc1564
dm: core: Create a new header file for 'compat' features
by Simon Glass
· Mon Feb 03 07:36:16 2020 -0700
783acfd
arm: rockchip: Add common cru.h
by Jagan Teki
· Thu Jan 09 14:22:17 2020 +0530
416f8d3
rockchip: clk: fix wrong CONFIG_IS_ENABLED handling
by Heiko Stuebner
· Sat Nov 09 00:06:30 2019 +0100
c312c10
rockchip: clk: rk3399: remove clk_enable()
by Kever Yang
· Wed Aug 28 16:23:51 2019 +0800
f0b0631
clk: rockchip: rk3399: Set 400MHz ddr clock
by Jagan Teki
· Tue Jul 16 17:27:36 2019 +0530
4833f32
clk: rockchip: rk3399: Set 50MHz ddr clock
by Jagan Teki
· Tue Jul 16 17:27:35 2019 +0530
bef02a3
clk: rockchip: rk3399: Fix check patch warnings and checks
by Jagan Teki
· Mon Jul 15 23:51:10 2019 +0530
ae58935
rockchip: clk: rk3399: handle clk_enable requests for USB3
by Mark Kettenis
· Sun Jun 30 18:01:53 2019 +0200
e5607a0
rockchip: clk: rk3399: allow requests for all UART clocks
by Christoph Muellner
· Tue May 07 10:58:44 2019 +0200
9fbe17c
rockchip: use 'arch-rockchip' as header file path
by Kever Yang
· Thu Mar 28 11:01:23 2019 +0800
d27b317
rockchip: clk: Add mention of four new clocks
by Simon Glass
· Mon Jan 21 14:53:30 2019 -0700
25c7ba9
rockchip: rk3399: Initialize CPU B clock.
by Christoph Muellner
· Fri Nov 30 20:32:48 2018 +0100
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
bdfb5c4
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
by Tom Rini
· Wed Apr 18 13:50:47 2018 -0400
932908c
rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
by Philipp Tomsich
· Fri Feb 23 17:36:41 2018 +0100
0b3cd54
rockchip: clk: rk3399: handle clk_enable requests for GMAC
by Philipp Tomsich
· Fri Feb 16 16:07:24 2018 +0100
6dd2fb4
rockchip: clk: guard set_parent implementations against OF_PLATDATA
by Philipp Tomsich
· Thu Jan 25 15:27:10 2018 +0100
2d20a63
rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-node
by Philipp Tomsich
· Mon Jan 08 14:00:27 2018 +0100
f4ba6ed
rockchip: clk: rk3399: implement set_parent() operation
by Philipp Tomsich
· Mon Jan 08 13:11:01 2018 +0100
432976f
rockchip: clk: bind reset driver
by Elaine Zhang
· Tue Dec 19 18:22:38 2017 +0800
8a4868f
rockchip: clk: rk3399: change extract_bits to bitfield_extract
by Philipp Tomsich
· Wed Nov 22 19:45:04 2017 +0100
4fbb6c2
rockchip: clock: update sysreset driver binding
by Kever Yang
· Fri Nov 03 15:16:13 2017 +0800
05a14b0
rockchip: rk3399: init CPU clock when rkclk_init()
by Kever Yang
· Thu Oct 12 15:27:29 2017 +0800
81e1042
treewide: replace with error() with pr_err()
by Masahiro Yamada
· Sat Sep 16 14:10:41 2017 +0900
f91b9b4
rockchip: clk: Add rk3399 SARADC clock support
by David Wu
· Wed Sep 20 14:38:58 2017 +0800
44d7684
rockchip: clk: rk3399: Convert to livetree
by Philipp Tomsich
· Tue Sep 12 17:32:24 2017 +0200
62332c1
rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1
by Philipp Tomsich
· Tue Sep 12 17:30:56 2017 +0200
1b1fe41
dtoc: Add support for 32 or 64-bit addresses
by Simon Glass
· Tue Aug 29 14:15:50 2017 -0600
f20995b
rockchip: clk: remove RATE_TO_DIV
by Kever Yang
· Thu Jul 27 12:54:02 2017 +0800
99b546d
rockchip: clk: update dwmmc clock div
by Kever Yang
· Thu Jul 27 12:54:01 2017 +0800
ba1dea4
dm: Rename dev_addr..() functions
by Simon Glass
· Wed May 17 17:18:05 2017 -0600
10b594b
rockchip: clk: rk3399: allow requests for HDMI clocks
by Philipp Tomsich
· Fri Apr 28 18:33:57 2017 +0200
d10b45e
rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS
by Philipp Tomsich
· Fri Apr 28 17:11:55 2017 +0200
78a7314
rockchip: clk: rk3399: adapt MMC clk configuration to the updated RK3399 DTS
by Philipp Tomsich
· Tue Apr 25 09:52:06 2017 +0200
30d7c15
rockchip: clk: rk3399: fix off-by one during rate calculation in i2c/spi_set_rate
by Philipp Tomsich
· Thu Apr 20 22:05:50 2017 +0200
c31ee92
rockchip: clk: rk3399: add clock support for SCLK_SPI1 and SCLK_SPI5
by Philipp Tomsich
· Thu Apr 20 22:05:49 2017 +0200
775bc39
rockchip: clk: rk3399: 24MHz is not a power of 2
by Philipp Tomsich
· Fri Mar 24 19:35:37 2017 +0100
bfa896c
rockchip: clk: rk3399: add clocking support for Ethernet
by Philipp Tomsich
· Fri Mar 24 19:24:25 2017 +0100
cf0a4ba
rockchip: clk: rk3399: fix warnings for unused variables in SPL/non-SPL
by Philipp Tomsich
· Fri Mar 24 19:24:24 2017 +0100
e198053
rockchip: clk: rk3399: update driver for spl
by Kever Yang
· Mon Feb 13 17:38:56 2017 +0800
d1dfea7
rockchip: rk3399: Move rockchip_get_cru() out of the driver
by Simon Glass
· Sat Oct 01 20:04:51 2016 -0600
78b6c3f
clk: rk3399: fix rockchip_get_cru
by Jacob Chen
· Tue Sep 27 15:48:45 2016 +0800
e54d26a
clk: rk3399: add pmucru controller support
by Kever Yang
· Fri Aug 12 17:47:15 2016 +0800
dc850de
clock: rk3399: add support for dwmmc 400K
by Kever Yang
· Thu Aug 04 11:44:58 2016 +0800
4776f0b
move: rockchip: move clock drivers into a subdirectory
by Heiko Stübner
· Fri Jul 29 14:47:21 2016 +0200
[Renamed from drivers/clk/clk_rk3399.c]
ca19eac
rk3399: add basic soc driver
by Kever Yang
· Fri Jul 29 10:35:25 2016 +0800