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git01.mediatek.com / filogic / uboot / 36feac9703d5835de1699adfdc1646b9a7424a42 / drivers / clk
  1. db4c2dc clk: ti: k3: Update driver to account for divider flags by Suman Anna · Tue Sep 07 17:16:58 2021 -0500
  2. 6bc722e clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-write by Dave Gerlach · Tue Sep 07 17:16:57 2021 -0500
  3. 5e317de drivers: clk: Add memory clock driver for Intel N5X device by Siew Chin Lim · Tue Aug 10 11:26:32 2021 +0800
  4. 1557df8 drivers: clk: Add clock driver for Intel N5X device by Siew Chin Lim · Tue Aug 10 11:26:30 2021 +0800
  5. db7b2f4 clk: clk_versaclock: Add support for versaclock driver by Adam Ford · Fri Jun 04 12:26:06 2021 -0500
  6. d69d174 clk: stm32mp1: add support of BSEC clock by Patrick Delaunay · Fri Jul 16 10:10:55 2021 +0200
  7. 8f20e73 rockchip: px30: Support configure SFC by Jon Lin · Thu Aug 05 16:27:53 2021 +0800
  8. dcd705e clk: stm32mp1: add support of missing SPI clocks by Patrick Delaunay · Fri Jul 09 14:24:34 2021 +0200
  9. 97790fb clk: zynqmp: Add support for enabling clock on lpd_lsbus by Michal Simek · Thu Jul 01 19:01:42 2021 +0200
  10. f5e1d9e Merge tag 'u-boot-imx-20210717' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx by Tom Rini · Sat Jul 17 10:52:21 2021 -0400
  11. 0a06b64 Merge branch '2021-07-15-assorted-fixes' by Tom Rini · Fri Jul 16 09:15:59 2021 -0400
  12. c7d146d clk: stm32mp1: add support of SYSCFG clock by Patrick Delaunay · Tue Jun 29 12:04:22 2021 +0200
  13. 862555d clk: Detect failure to set defaults by Simon Glass · Thu May 13 19:39:31 2021 -0600
  14. 04f1971 clk: uniphier: Add PCIe clock entry by Kunihiko Hayashi · Tue Jul 06 19:01:06 2021 +0900
  15. 339beba clk: imx8mm: Add SPI clocks by Frieder Schrempf · Mon Jun 07 14:36:43 2021 +0200
  16. 4481168 clk: armada-37xx: Set DM_FLAG_PRE_RELOC by Marek Behún · Tue May 25 19:42:39 2021 +0200
  17. 4aab306 Merge tag 'dm-pull-6jul21' of https://source.denx.de/u-boot/custodians/u-boot-dm by Tom Rini · Wed Jul 07 13:34:42 2021 -0400
  18. 8131335 dm: define LOG_CATEGORY for all uclass by Patrick Delaunay · Tue Apr 27 11:02:19 2021 +0200
  19. f872d47 drivers: clk: sifive: fu740-prci: replace 'pciaux' with 'pcieaux' by Green Wan · Mon Jun 28 19:13:08 2021 +0800
  20. 08b3fd6 Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next by Tom Rini · Thu Jul 01 08:57:23 2021 -0400
  21. 159b60e Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next by Tom Rini · Mon Jun 28 18:32:07 2021 -0400
  22. d3e8b73 Merge tag 'v2021.07-rc5' into next by Tom Rini · Mon Jun 28 16:22:13 2021 -0400
  23. 86d59f3 clk: renesas: Add R8A779A0 clock tables by Hai Pham · Tue Aug 11 10:46:34 2020 +0700
  24. 0fbb8a7 clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock code by Marek Vasut · Tue Apr 27 19:52:53 2021 +0200
  25. 39df053 clk: zynq: Add clock wizard driver by Zhengxun · Fri Jun 11 15:10:48 2021 +0000
  26. ce92768 Merge tag 'u-boot-rockchip-20210618' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next by Tom Rini · Sat Jun 19 08:20:12 2021 -0400
  27. b9c3214 clk: cosmetic change in uclass by Patrick Delaunay · Tue Apr 27 10:57:54 2021 +0200
  28. 5be90bb rockchip: rk3568: add clock driver by Elaine Zhang · Wed Jun 02 11:39:24 2021 +0800
  29. 152919d clk: k210: Move k210 clock out of its own subdirectory by Sean Anderson · Fri Jun 11 00:16:14 2021 -0400
  30. 16d64cd clk: k210: Remove bypass driver by Sean Anderson · Fri Jun 11 00:16:13 2021 -0400
  31. 1a37182 clk: k210: Don't set PLL rates if we are already at the correct rate by Sean Anderson · Fri Jun 11 00:16:12 2021 -0400
  32. 3a29bc6 clk: k210: Re-add support for setting rate by Sean Anderson · Fri Jun 11 00:16:11 2021 -0400
  33. ecf9284 clk: k210: Implement soc_clk_dump by Sean Anderson · Fri Jun 11 00:16:10 2021 -0400
  34. edbe849 clk: k210: Move pll into the rest of the driver by Sean Anderson · Fri Jun 11 00:16:09 2021 -0400
  35. 2957313 clk: k210: Rewrite to remove CCF by Sean Anderson · Fri Jun 11 00:16:08 2021 -0400
  36. 08d531c clk: Allow force setting clock defaults before relocation by Sean Anderson · Fri Jun 11 00:16:07 2021 -0400
  37. 82ceb0d clk: add support for TI K3 SoC clocks by Tero Kristo · Fri Jun 11 11:45:14 2021 +0300
  38. 81744b7 clk: add support for TI K3 SoC PLL by Tero Kristo · Fri Jun 11 11:45:13 2021 +0300
  39. 9ab78c1 clk: fix set_rate to clean up cached rates for the hierarchy by Tero Kristo · Fri Jun 11 11:45:12 2021 +0300
  40. d41b2b3 clk: fix assigned-clocks to pass with deferring provider by Tero Kristo · Fri Jun 11 11:45:11 2021 +0300
  41. 1770884 clk: sci-clk: fix return value of set_rate by Tero Kristo · Fri Jun 11 11:45:10 2021 +0300
  42. f04dfff clk: do not attempt to fetch clock pointer with null device by Tero Kristo · Fri Jun 11 11:45:08 2021 +0300
  43. de4ef9b clk: fixed_rate: add API for directly registering fixed rate clocks by Tero Kristo · Fri Jun 11 11:45:06 2021 +0300
  44. d08f867 clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 by Giulio Benetti · Thu May 20 16:10:14 2021 +0200
  45. 71d1ee4 clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB by Giulio Benetti · Thu May 13 12:19:33 2021 +0200
  46. ecefa5f drivers: clk: add fu740 support by Green Wan · Thu May 27 06:52:08 2021 -0700
  47. 4bebdd3 treewide: Convert macro and uses of __section(foo) to __section("foo") by Marek Behún · Thu May 20 13:23:52 2021 +0200
  48. 8f56786 clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handling by Marek Vasut · Tue Apr 27 19:36:39 2021 +0200
  49. 9480346 clk: renesas: Add register pointers into struct cpg_mssr_info by Hai Pham · Thu Nov 05 22:30:37 2020 +0700
  50. 016a4c2 clk: renesas: Introduce enum clk_reg_layout by Hai Pham · Thu Nov 05 21:32:38 2020 +0700
  51. 5460ee0 clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable() by Hai Pham · Fri May 22 10:39:04 2020 +0700
  52. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · Sun Apr 25 21:53:05 2021 +0200
  53. 215de2b clk: renesas: Add support for RPCD2 clock by Hai Pham · Tue Aug 11 10:25:28 2020 +0700
  54. 1a61896 clk: renesas: Fix Realtime Module Stop Control Register offsets by Hai Pham · Tue May 19 17:42:05 2020 +0700
  55. f2279df clk: renesas: Fix incorrect return RPC clk_get_rate by Hai Pham · Sat Dec 05 09:35:40 2020 +0700
  56. f5fec9d clk: renesas: Reinstate RPC clock on R-Car D3/E3 by Marek Vasut · Sun Apr 25 21:26:22 2021 +0200
  57. 0e8dcb7 clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:10:40 2021 +0200
  58. aac4de2 clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:09:10 2021 +0200
  59. 8538d53 clk: renesas: Synchronize RZ/G2 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:08:18 2021 +0200
  60. 8aa82e1 clk: Add support for the k210 clock driver pre-relocation by Sean Anderson · Thu Apr 08 22:13:08 2021 -0400
  61. 95d2724 clk: k210: Move the clint clock to under aclk by Sean Anderson · Thu Apr 08 22:13:07 2021 -0400
  62. afab998 clk: k210: Remove k210_register_pll by Sean Anderson · Thu Apr 08 22:13:06 2021 -0400
  63. 16e5c17 clk: k210: Fix PLL enable always getting taken by Sean Anderson · Thu Apr 08 22:13:05 2021 -0400
  64. e649ff3 clk: k210: Fix PLLs not being enabled by Sean Anderson · Thu Apr 08 22:13:04 2021 -0400
  65. d7ac373 clk: Warn on failure to assign rate by Sean Anderson · Thu Apr 08 22:13:03 2021 -0400
  66. eff80eb clk: ti: am3-dpll: use custom API for memory access by Dario Binacchi · Sat May 01 17:05:25 2021 +0200
  67. 3693460 clk: ti: gate: use custom API for memory access by Dario Binacchi · Sat May 01 17:05:24 2021 +0200
  68. ac7c705 clk: ti: change clk_ti_latch() signature by Dario Binacchi · Sat May 01 17:05:23 2021 +0200
  69. 6dfe426 clk: ti: add custom API for memory access by Dario Binacchi · Sat May 01 17:05:22 2021 +0200
  70. a738b53 Merge tag 'xilinx-for-v2021.07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze by Tom Rini · Thu Apr 29 11:31:06 2021 -0400
  71. 5af8b6a clk: renesas: Synchronize Gen2 MSTP teardown tables by Marek Vasut · Sat Jun 06 15:26:14 2020 +0200
  72. 22f9fc7 clk: renesas: Only ever access documented bits in clock driver teardown by Marek Vasut · Sat Apr 25 14:57:45 2020 +0200
  73. 8ce9043 clk: Fix typo in Zynq Kconfig symbol description by Michal Simek · Wed Apr 07 14:36:14 2021 +0200
  74. e275751 clk: meson-g12a: add PCIe gates by Neil Armstrong · Thu Feb 25 18:46:12 2021 +0100
  75. d73b8a5 clk: sunxi: h6: Add XHCI clocks by Samuel Holland · Sun Feb 07 23:57:20 2021 -0600
  76. 5861030 clk: sunxi: Add a dummy clock driver for the RTC by Samuel Holland · Sun Feb 07 23:57:19 2021 -0600
  77. 3ff5d69 clk: mpfs_clk: Enable DM_FLAG_PRE_RELOC flag by Bin Meng · Wed Mar 31 15:24:49 2021 +0800
  78. 46e5f61 clk: Return -ENOSYS when system call is not available by Simon Glass · Thu Mar 25 10:26:09 2021 +1300
  79. 29ff16a clk: Update drivers to use -EINVAL by Simon Glass · Thu Mar 25 10:26:08 2021 +1300
  80. 86676e0 Merge tag 'xilinx-for-v2021.07' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next by Tom Rini · Wed Mar 31 09:47:30 2021 -0400
  81. 97ab47d clk: zynqmp: Fix clk dump values by T Karthik Reddy · Wed Feb 24 23:44:46 2021 -0700
  82. 0000e0d dm: Rename device_get_by_driver_info_idx() by Simon Glass · Mon Mar 15 17:25:28 2021 +1300
  83. 9bb88fb clk: sandbox: Create a special fixed-rate driver by Simon Glass · Mon Mar 15 17:25:24 2021 +1300
  84. b95c7b9 clk: fixed-rate: Export driver parts for OF_PLATDATA_INST by Simon Glass · Mon Mar 15 17:25:23 2021 +1300
  85. 96d5736 clk: sandbox: Move priv/plat data to a header file by Simon Glass · Mon Mar 15 17:25:22 2021 +1300
  86. 55a7814 clk: stm32mp1: gets root clocks from fdt by Etienne Carriere · Wed Feb 24 11:19:42 2021 +0100
  87. df070ce Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze by Tom Rini · Tue Feb 23 10:45:55 2021 -0500
  88. 277300f clk: versal: Add support to enable clocks by T Karthik Reddy · Wed Feb 03 03:10:47 2021 -0700
  89. 2aa360e clk: zynqmp: Add support to enable clocks by T Karthik Reddy · Wed Feb 03 03:10:45 2021 -0700
  90. 4171095 clk: zynq: Add dummy clock enable function by Michal Simek · Tue Feb 09 15:28:15 2021 +0100
  91. 9fcb0d7 clk: ti: improve debug messages for clkctrl driver by Dario Binacchi · Sat Feb 13 12:02:30 2021 +0100
  92. b1db71b Merge branch '2021-02-02-drop-asm_global_data-when-unused' by Tom Rini · Mon Feb 15 08:19:40 2021 -0500
  93. 9589167 clk: at91: compat: partially revert "dm: Remove uses of device_bind_offset()" by Eugen Hristev · Tue Feb 02 10:47:58 2021 +0200
  94. 5c0ea51 clk: stm32mp1: add support of I2C6_K by Patrick Delaunay · Fri Jan 22 15:34:25 2021 +0100
  95. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  96. 6646c57 clk: x86: Correct the driver name by Simon Glass · Thu Jan 21 13:57:12 2021 -0700
  97. f73f581 clk: Add debugging for return values by Simon Glass · Thu Jan 21 13:57:11 2021 -0700
  98. d719a4d Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi by Tom Rini · Mon Jan 25 19:46:02 2021 -0500
  99. e52dc3e clk: sunxi: Add support for H616 clocks by Jernej Skrabec · Mon Jan 11 21:11:52 2021 +0100
  100. 7bf38bc Merge tag 'mips-pull-2021-01-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips by Tom Rini · Mon Jan 25 14:38:40 2021 -0500