814217e927884a310af413b713c05450b4e2d13a - filogic/uboot

commit	814217e927884a310af413b713c05450b4e2d13a	[log] [tgz]
author	Marek Vasut <marek.vasut+renesas@gmail.com>	Sun Apr 25 21:53:05 2021 +0200
committer	Marek Vasut <marek.vasut+renesas@gmail.com>	Fri May 21 15:00:17 2021 +0200
tree	9c51563a2f29c1e79e9ab7e9f4c8afc82756ac78
parent	215de2bb78ed17613834c9a485dffa88a7dc33a1 [diff]

clk: renesas: Make reset controller modemr register offset configurable

The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.

Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

drivers/clk/renesas/clk-rcar-gen2.c[diff]
drivers/clk/renesas/clk-rcar-gen3.c[diff]
drivers/clk/renesas/r8a774a1-cpg-mssr.c[diff]
drivers/clk/renesas/r8a774b1-cpg-mssr.c[diff]
drivers/clk/renesas/r8a774c0-cpg-mssr.c[diff]
drivers/clk/renesas/r8a774e1-cpg-mssr.c[diff]
drivers/clk/renesas/r8a7790-cpg-mssr.c[diff]
drivers/clk/renesas/r8a7791-cpg-mssr.c[diff]
drivers/clk/renesas/r8a7792-cpg-mssr.c[diff]
drivers/clk/renesas/r8a7794-cpg-mssr.c[diff]
drivers/clk/renesas/r8a7795-cpg-mssr.c[diff]
drivers/clk/renesas/r8a7796-cpg-mssr.c[diff]
drivers/clk/renesas/r8a77965-cpg-mssr.c[diff]
drivers/clk/renesas/r8a77970-cpg-mssr.c[diff]
drivers/clk/renesas/r8a77980-cpg-mssr.c[diff]
drivers/clk/renesas/r8a77990-cpg-mssr.c[diff]
drivers/clk/renesas/r8a77995-cpg-mssr.c[diff]
drivers/clk/renesas/rcar-gen2-cpg.h[diff]
drivers/clk/renesas/rcar-gen3-cpg.h[diff]
drivers/clk/renesas/renesas-cpg-mssr.h[diff]

20 files changed

tree: 9c51563a2f29c1e79e9ab7e9f4c8afc82756ac78