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git01.mediatek.com
/
filogic
/
uboot
/
33651ac605fdbf6f31f432e8b7b3967adf87973c
/
drivers
/
clk
/
renesas
/
clk-rcar-gen2.c
b2970fd
clk: renesas: Convert Gen2/Gen3 clock tables to clk-provider struct clk_div_table
by Marek Vasut
· Thu Jan 26 21:06:02 2023 +0100
a1b654b
treewide: invaild -> invalid
by Sean Anderson
· Wed Dec 01 14:26:53 2021 -0500
5460ee0
clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()
by Hai Pham
· Fri May 22 10:39:04 2020 +0700
814217e
clk: renesas: Make reset controller modemr register offset configurable
by Marek Vasut
· Sun Apr 25 21:53:05 2021 +0200
3ba929a
common: Drop asm/global_data.h from common header
by Simon Glass
· Fri Oct 30 21:38:53 2020 -0600
1096ae1
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
by Masahiro Yamada
· Fri Jul 17 14:36:46 2020 +0900
5a9ecb2
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
by Tom Rini
· Fri Jul 24 08:42:06 2020 -0400
a3332a1
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
by Masahiro Yamada
· Fri Jul 17 14:36:46 2020 +0900
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
ab11876
clk: renesas: Switch to fdtdec_get_addr_size_auto_noparent() on Gen2
by Marek Vasut
· Sat Mar 21 16:45:29 2020 +0100
0f6aa07
clk: renesas: Add support for setting MMCIF clock divider on Gen2
by Marek Vasut
· Mon Mar 18 06:04:02 2019 +0100
31872db
clk: renesas: Fix swapped div and mul in debug output on Gen2
by Marek Vasut
· Mon Mar 18 05:38:08 2019 +0100
272daa7
clk: renesas: Fix SDH clock divider decoding on Gen2
by Marek Vasut
· Mon Mar 18 05:11:42 2019 +0100
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
f63b295
clk: renesas: Add Gen2 clock core
by Marek Vasut
· Mon Jan 08 16:38:51 2018 +0100