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git01.mediatek.com / filogic / uboot / 1f34678febfae03faf565ab68555374e06a9a7d0 / arch / riscv / cpu / ax25 / Kconfig
  1. 276292a riscv: ax25: add SPL support by Rick Chen · Thu Nov 14 13:52:21 2019 +0800
  2. 19117d2 riscv: ax25: add imply v5l2 cache controller by Rick Chen · Thu Aug 29 10:30:13 2019 +0800
  3. 6134659 riscv: add run mode configuration for SPL by Lukas Auer · Wed Aug 21 21:14:43 2019 +0200
  4. f71410a riscv: ax25: Andes specific cache shall only support in M-mode by Rick Chen · Tue Apr 02 15:56:42 2019 +0800
  5. 14a1075 riscv: ax25: Add platform-specific Kconfig options by Rick Chen · Tue Apr 02 15:56:41 2019 +0800
  6. 4b284ad riscv: ax25: Hide the ax25-specific Kconfig option by Bin Meng · Wed Dec 12 06:12:28 2018 -0800
  7. 842d580 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · Wed Nov 07 09:34:06 2018 +0800