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git01.mediatek.com / filogic / uboot / 1e26864b5a0cc69abaa2c88634bb3f807e6cd60c / arch / riscv / cpu / ax25 / cache.c
  1. d12b55b riscv: ax25: cache: Remove SPL_RISCV_MMODE config check by Pragnesh Patel · Sat Mar 14 19:12:28 2020 +0530
  2. 883275d riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL by Rick Chen · Thu Nov 14 13:52:25 2019 +0800
  3. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  4. 49cb706 riscv: cache: use CCTL to flush d-cache by Rick Chen · Wed Aug 28 18:46:11 2019 +0800
  5. 05a684e riscv: cache: Flush L2 cache before jump to linux by Rick Chen · Wed Aug 28 18:46:09 2019 +0800
  6. 43ec7e0 CONFIG_SPL_SYS_[DI]CACHE_OFF: add by Trevor Woerner · Fri May 03 09:41:00 2019 -0400
  7. 6280e32 riscv: move the AX25-specific implementation of flush_dcache_all by Lukas Auer · Fri Jan 04 01:37:29 2019 +0100
  8. 4b284ad riscv: ax25: Hide the ax25-specific Kconfig option by Bin Meng · Wed Dec 12 06:12:28 2018 -0800
  9. 842d580 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · Wed Nov 07 09:34:06 2018 +0800