Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 0fea34e24d8a4e933653a041166f263258fdd0b4 / arch / riscv / dts / jh7110.dtsi
  1. 23dfd81 riscv: dts: starfive: Enable PCIe host controller by Mason Huo · Tue Jul 25 17:46:50 2023 +0800
  2. 1345c9e riscv: dts: jh7110: Add clock source from PLL by Xingyu Wu · Fri Jul 07 18:50:09 2023 +0800
  3. 7ae81bb riscv: dts: jh7110: Add PLL clock controller node by Xingyu Wu · Fri Jul 07 18:50:08 2023 +0800
  4. 7f63bd9 riscv: dts: jh7110: Add ethernet device tree nodes by Yanhong Wang · Thu Jun 15 17:36:44 2023 +0800
  5. 96c3eb72 riscv: dts: jh7110: Add initial StarFive JH7110 device tree by Yanhong Wang · Wed Mar 29 11:42:21 2023 +0800