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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dirk Eibach762d3df2013-06-26 15:55:17 +02002/*
3 * Copyright 2010 Freescale Semiconductor, Inc.
4 * Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
5 * Timur Tabi <timur@freescale.com>
Dirk Eibach762d3df2013-06-26 15:55:17 +02006 */
7
8#include <common.h>
9#include <i2c.h>
10
York Sunf0626592013-09-30 09:22:09 -070011#include <fsl_ddr_sdram.h>
12#include <fsl_ddr_dimm_params.h>
Dirk Eibach762d3df2013-06-26 15:55:17 +020013
14void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,
15 unsigned int ctrl_num)
16{
17 unsigned int i;
18
19 if (ctrl_num) {
20 printf("Wrong parameter for controller number %d", ctrl_num);
21 return;
22 }
23 if (!pdimm->n_ranks)
24 return;
25
26 /* set odt_rd_cfg and odt_wr_cfg. */
27 for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
28 popts->cs_local_opts[i].odt_rd_cfg = 0;
29 popts->cs_local_opts[i].odt_wr_cfg = 1;
30 }
31
32 popts->clk_adjust = 5;
33 popts->cpo_override = 0x1f;
34 popts->write_data_delay = 2;
35 popts->half_strength_driver_enable = 1;
36
37 /* Per AN4039, enable ZQ calibration. */
38 popts->zq_en = 1;
39}
40
41#ifdef CONFIG_SPD_EEPROM
42/*
43 * we only have a "fake" SPD-EEPROM here, which has 16 bit addresses
44 */
45void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
46{
47 int ret = i2c_read(i2c_address, 0, 2, (uchar *)spd,
48 sizeof(generic_spd_eeprom_t));
49
50 if (ret) {
51 if (i2c_address ==
52#ifdef SPD_EEPROM_ADDRESS
53 SPD_EEPROM_ADDRESS
54#elif defined(SPD_EEPROM_ADDRESS1)
55 SPD_EEPROM_ADDRESS1
56#endif
57 ) {
58 printf("DDR: failed to read SPD from address %u\n",
59 i2c_address);
60 } else {
61 debug("DDR: failed to read SPD from address %u\n",
62 i2c_address);
63 }
64 memset(spd, 0, sizeof(generic_spd_eeprom_t));
65 }
66}
67#endif