blob: 7596736bfd4873c0ae95c4a512131582cd759b86 [file] [log] [blame]
Dirk Eibach762d3df2013-06-26 15:55:17 +02001/*
2 * Copyright 2010 Freescale Semiconductor, Inc.
3 * Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
4 * Timur Tabi <timur@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 */
11
12#include <common.h>
13#include <i2c.h>
14
York Sunf0626592013-09-30 09:22:09 -070015#include <fsl_ddr_sdram.h>
16#include <fsl_ddr_dimm_params.h>
Dirk Eibach762d3df2013-06-26 15:55:17 +020017
18void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,
19 unsigned int ctrl_num)
20{
21 unsigned int i;
22
23 if (ctrl_num) {
24 printf("Wrong parameter for controller number %d", ctrl_num);
25 return;
26 }
27 if (!pdimm->n_ranks)
28 return;
29
30 /* set odt_rd_cfg and odt_wr_cfg. */
31 for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
32 popts->cs_local_opts[i].odt_rd_cfg = 0;
33 popts->cs_local_opts[i].odt_wr_cfg = 1;
34 }
35
36 popts->clk_adjust = 5;
37 popts->cpo_override = 0x1f;
38 popts->write_data_delay = 2;
39 popts->half_strength_driver_enable = 1;
40
41 /* Per AN4039, enable ZQ calibration. */
42 popts->zq_en = 1;
43}
44
45#ifdef CONFIG_SPD_EEPROM
46/*
47 * we only have a "fake" SPD-EEPROM here, which has 16 bit addresses
48 */
49void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
50{
51 int ret = i2c_read(i2c_address, 0, 2, (uchar *)spd,
52 sizeof(generic_spd_eeprom_t));
53
54 if (ret) {
55 if (i2c_address ==
56#ifdef SPD_EEPROM_ADDRESS
57 SPD_EEPROM_ADDRESS
58#elif defined(SPD_EEPROM_ADDRESS1)
59 SPD_EEPROM_ADDRESS1
60#endif
61 ) {
62 printf("DDR: failed to read SPD from address %u\n",
63 i2c_address);
64 } else {
65 debug("DDR: failed to read SPD from address %u\n",
66 i2c_address);
67 }
68 memset(spd, 0, sizeof(generic_spd_eeprom_t));
69 }
70}
71#endif