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wdenkef893942004-02-23 16:11:30 +00001/*
2 * Copyright (c) 2004 Picture Elements, Inc.
3 * Stephen Williams (XXXXXXXXXXXXXXXX)
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkef893942004-02-23 16:11:30 +00006 */
wdenkef893942004-02-23 16:11:30 +00007
8/*
9 * The Xilinx SystemACE chip support is activated by defining
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020010 * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE
wdenkef893942004-02-23 16:11:30 +000011 * to set the base address of the device. This code currently
12 * assumes that the chip is connected via a byte-wide bus.
13 *
14 * The CONFIG_SYSTEMACE also adds to fat support the device class
15 * "ace" that allows the user to execute "fatls ace 0" and the
16 * like. This works by making the systemace_get_dev function
17 * available to cmd_fat.c:get_dev and filling in a block device
18 * description that has all the bits needed for FAT support to
19 * read sectors.
Wolfgang Denkeb95c852005-08-10 15:14:32 +020020 *
Wolfgang Denkfdb87ed2005-08-07 23:55:50 +020021 * According to Xilinx technical support, before accessing the
22 * SystemACE CF you need to set the following control bits:
Grant Likely715a70b2007-02-20 09:05:16 +010023 * FORCECFGMODE : 1
24 * CFGMODE : 0
25 * CFGSTART : 0
wdenkef893942004-02-23 16:11:30 +000026 */
27
Grant Likely715a70b2007-02-20 09:05:16 +010028#include <common.h>
29#include <command.h>
30#include <systemace.h>
31#include <part.h>
32#include <asm/io.h>
wdenkef893942004-02-23 16:11:30 +000033
wdenkef893942004-02-23 16:11:30 +000034/*
35 * The ace_readw and writew functions read/write 16bit words, but the
36 * offset value is the BYTE offset as most used in the Xilinx
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037 * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined
wdenkef893942004-02-23 16:11:30 +000038 * to be the base address for the chip, usually in the local
39 * peripheral bus.
40 */
Michal Simeka39809c2012-07-04 12:09:45 +020041
42static u32 base = CONFIG_SYS_SYSTEMACE_BASE;
43static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;
44
45static void ace_writew(u16 val, unsigned off)
46{
47 if (width == 8) {
wdenk57bfdd42004-09-29 22:55:14 +000048#if !defined(__BIG_ENDIAN)
Michal Simeka39809c2012-07-04 12:09:45 +020049 writeb(val >> 8, base + off);
50 writeb(val, base + off + 1);
wdenk57bfdd42004-09-29 22:55:14 +000051#else
Michal Simeka39809c2012-07-04 12:09:45 +020052 writeb(val, base + off);
53 writeb(val >> 8, base + off + 1);
wdenk57bfdd42004-09-29 22:55:14 +000054#endif
Alexey Brodkin4862ffa2013-01-03 13:35:23 +040055 } else
56 out16(base + off, val);
Michal Simeka39809c2012-07-04 12:09:45 +020057}
58
59static u16 ace_readw(unsigned off)
60{
61 if (width == 8) {
62#if !defined(__BIG_ENDIAN)
63 return (readb(base + off) << 8) | readb(base + off + 1);
wdenk57bfdd42004-09-29 22:55:14 +000064#else
Michal Simeka39809c2012-07-04 12:09:45 +020065 return readb(base + off) | (readb(base + off + 1) << 8);
wdenk57bfdd42004-09-29 22:55:14 +000066#endif
Michal Simeka39809c2012-07-04 12:09:45 +020067 }
wdenkef893942004-02-23 16:11:30 +000068
Michal Simeka39809c2012-07-04 12:09:45 +020069 return in16(base + off);
70}
wdenkef893942004-02-23 16:11:30 +000071
Grant Likely715a70b2007-02-20 09:05:16 +010072static unsigned long systemace_read(int dev, unsigned long start,
Alexey Brodkin5a3720dd2013-01-03 01:02:46 +000073 lbaint_t blkcnt, void *buffer);
wdenkef893942004-02-23 16:11:30 +000074
Grant Likely715a70b2007-02-20 09:05:16 +010075static block_dev_desc_t systemace_dev = { 0 };
wdenkef893942004-02-23 16:11:30 +000076
77static int get_cf_lock(void)
78{
Grant Likely715a70b2007-02-20 09:05:16 +010079 int retry = 10;
wdenkef893942004-02-23 16:11:30 +000080
81 /* CONTROLREG = LOCKREG */
Grant Likely715a70b2007-02-20 09:05:16 +010082 unsigned val = ace_readw(0x18);
83 val |= 0x0002;
84 ace_writew((val & 0xffff), 0x18);
wdenkef893942004-02-23 16:11:30 +000085
86 /* Wait for MPULOCK in STATUSREG[15:0] */
Grant Likely715a70b2007-02-20 09:05:16 +010087 while (!(ace_readw(0x04) & 0x0002)) {
wdenkef893942004-02-23 16:11:30 +000088
Grant Likely715a70b2007-02-20 09:05:16 +010089 if (retry < 0)
90 return -1;
wdenkef893942004-02-23 16:11:30 +000091
Grant Likely715a70b2007-02-20 09:05:16 +010092 udelay(100000);
93 retry -= 1;
94 }
wdenkef893942004-02-23 16:11:30 +000095
Grant Likely715a70b2007-02-20 09:05:16 +010096 return 0;
wdenkef893942004-02-23 16:11:30 +000097}
98
99static void release_cf_lock(void)
100{
Grant Likely715a70b2007-02-20 09:05:16 +0100101 unsigned val = ace_readw(0x18);
102 val &= ~(0x0002);
103 ace_writew((val & 0xffff), 0x18);
wdenkef893942004-02-23 16:11:30 +0000104}
105
Matthew McClintock6252b4f2011-05-24 05:31:19 +0000106#ifdef CONFIG_PARTITIONS
Grant Likely715a70b2007-02-20 09:05:16 +0100107block_dev_desc_t *systemace_get_dev(int dev)
wdenkef893942004-02-23 16:11:30 +0000108{
109 /* The first time through this, the systemace_dev object is
110 not yet initialized. In that case, fill it in. */
Grant Likely715a70b2007-02-20 09:05:16 +0100111 if (systemace_dev.blksz == 0) {
112 systemace_dev.if_type = IF_TYPE_UNKNOWN;
113 systemace_dev.dev = 0;
114 systemace_dev.part_type = PART_TYPE_UNKNOWN;
115 systemace_dev.type = DEV_TYPE_HARDDISK;
116 systemace_dev.blksz = 512;
Egbert Eich2eec2ab2013-04-09 21:11:56 +0000117 systemace_dev.log2blksz = LOG2(systemace_dev.blksz);
Grant Likely715a70b2007-02-20 09:05:16 +0100118 systemace_dev.removable = 1;
119 systemace_dev.block_read = systemace_read;
Wolfgang Denkfdb87ed2005-08-07 23:55:50 +0200120
Stefan Roese51c8dde2007-02-20 13:17:42 +0100121 /*
Stefan Roesefe205162007-02-22 07:40:23 +0100122 * Ensure the correct bus mode (8/16 bits) gets enabled
Stefan Roese51c8dde2007-02-20 13:17:42 +0100123 */
Michal Simeka39809c2012-07-04 12:09:45 +0200124 ace_writew(width == 8 ? 0 : 0x0001, 0);
Stefan Roese51c8dde2007-02-20 13:17:42 +0100125
Grant Likely715a70b2007-02-20 09:05:16 +0100126 init_part(&systemace_dev);
Wolfgang Denkfdb87ed2005-08-07 23:55:50 +0200127
Grant Likely715a70b2007-02-20 09:05:16 +0100128 }
wdenkef893942004-02-23 16:11:30 +0000129
Grant Likely715a70b2007-02-20 09:05:16 +0100130 return &systemace_dev;
wdenkef893942004-02-23 16:11:30 +0000131}
Matthew McClintock6252b4f2011-05-24 05:31:19 +0000132#endif
wdenkef893942004-02-23 16:11:30 +0000133
134/*
135 * This function is called (by dereferencing the block_read pointer in
136 * the dev_desc) to read blocks of data. The return value is the
137 * number of blocks read. A zero return indicates an error.
138 */
Grant Likely715a70b2007-02-20 09:05:16 +0100139static unsigned long systemace_read(int dev, unsigned long start,
Alexey Brodkin5a3720dd2013-01-03 01:02:46 +0000140 lbaint_t blkcnt, void *buffer)
wdenkef893942004-02-23 16:11:30 +0000141{
Grant Likely715a70b2007-02-20 09:05:16 +0100142 int retry;
143 unsigned blk_countdown;
Grant Likely2089cab2007-02-20 09:05:45 +0100144 unsigned char *dp = buffer;
Grant Likely715a70b2007-02-20 09:05:16 +0100145 unsigned val;
wdenkef893942004-02-23 16:11:30 +0000146
Grant Likely715a70b2007-02-20 09:05:16 +0100147 if (get_cf_lock() < 0) {
148 unsigned status = ace_readw(0x04);
wdenkef893942004-02-23 16:11:30 +0000149
Grant Likely715a70b2007-02-20 09:05:16 +0100150 /* If CFDETECT is false, card is missing. */
151 if (!(status & 0x0010)) {
152 printf("** CompactFlash card not present. **\n");
153 return 0;
154 }
wdenkef893942004-02-23 16:11:30 +0000155
Grant Likely715a70b2007-02-20 09:05:16 +0100156 printf("**** ACE locked away from me (STATUSREG=%04x)\n",
157 status);
158 return 0;
159 }
wdenk372f0302004-02-27 08:21:54 +0000160#ifdef DEBUG_SYSTEMACE
Grant Likely715a70b2007-02-20 09:05:16 +0100161 printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
wdenk372f0302004-02-27 08:21:54 +0000162#endif
163
Grant Likely715a70b2007-02-20 09:05:16 +0100164 retry = 2000;
165 for (;;) {
166 val = ace_readw(0x04);
wdenkef893942004-02-23 16:11:30 +0000167
Grant Likely715a70b2007-02-20 09:05:16 +0100168 /* If CFDETECT is false, card is missing. */
169 if (!(val & 0x0010)) {
170 printf("**** ACE CompactFlash not found.\n");
171 release_cf_lock();
172 return 0;
173 }
wdenkef893942004-02-23 16:11:30 +0000174
Grant Likely715a70b2007-02-20 09:05:16 +0100175 /* If RDYFORCMD, then we are ready to go. */
176 if (val & 0x0100)
177 break;
wdenkef893942004-02-23 16:11:30 +0000178
Grant Likely715a70b2007-02-20 09:05:16 +0100179 if (retry < 0) {
180 printf("**** SystemACE not ready.\n");
181 release_cf_lock();
182 return 0;
183 }
wdenkef893942004-02-23 16:11:30 +0000184
Grant Likely715a70b2007-02-20 09:05:16 +0100185 udelay(1000);
186 retry -= 1;
187 }
wdenkef893942004-02-23 16:11:30 +0000188
wdenk372f0302004-02-27 08:21:54 +0000189 /* The SystemACE can only transfer 256 sectors at a time, so
190 limit the current chunk of sectors. The blk_countdown
191 variable is the number of sectors left to transfer. */
wdenkef893942004-02-23 16:11:30 +0000192
Grant Likely715a70b2007-02-20 09:05:16 +0100193 blk_countdown = blkcnt;
194 while (blk_countdown > 0) {
195 unsigned trans = blk_countdown;
wdenkef893942004-02-23 16:11:30 +0000196
Grant Likely715a70b2007-02-20 09:05:16 +0100197 if (trans > 256)
198 trans = 256;
wdenkef893942004-02-23 16:11:30 +0000199
wdenk372f0302004-02-27 08:21:54 +0000200#ifdef DEBUG_SYSTEMACE
Grant Likely715a70b2007-02-20 09:05:16 +0100201 printf("... transfer %lu sector in a chunk\n", trans);
wdenk372f0302004-02-27 08:21:54 +0000202#endif
Grant Likely715a70b2007-02-20 09:05:16 +0100203 /* Write LBA block address */
204 ace_writew((start >> 0) & 0xffff, 0x10);
Stefan Roese51c8dde2007-02-20 13:17:42 +0100205 ace_writew((start >> 16) & 0x0fff, 0x12);
wdenkef893942004-02-23 16:11:30 +0000206
Grant Likely715a70b2007-02-20 09:05:16 +0100207 /* NOTE: in the Write Sector count below, a count of 0
208 causes a transfer of 256, so &0xff gives the right
209 value for whatever transfer count we want. */
wdenk372f0302004-02-27 08:21:54 +0000210
Grant Likely715a70b2007-02-20 09:05:16 +0100211 /* Write sector count | ReadMemCardData. */
212 ace_writew((trans & 0xff) | 0x0300, 0x14);
wdenk372f0302004-02-27 08:21:54 +0000213
Wolfgang Denk870c5c42007-05-16 00:13:33 +0200214/*
Michal Simek562ce292007-04-21 21:07:22 +0200215 * For FPGA configuration via SystemACE is reset unacceptable
216 * CFGDONE bit in STATUSREG is not set to 1.
217 */
218#ifndef SYSTEMACE_CONFIG_FPGA
Grant Likely715a70b2007-02-20 09:05:16 +0100219 /* Reset the configruation controller */
220 val = ace_readw(0x18);
221 val |= 0x0080;
222 ace_writew(val, 0x18);
Michal Simek562ce292007-04-21 21:07:22 +0200223#endif
Wolfgang Denkfdb87ed2005-08-07 23:55:50 +0200224
Grant Likely715a70b2007-02-20 09:05:16 +0100225 retry = trans * 16;
226 while (retry > 0) {
227 int idx;
wdenk372f0302004-02-27 08:21:54 +0000228
Grant Likely715a70b2007-02-20 09:05:16 +0100229 /* Wait for buffer to become ready. */
230 while (!(ace_readw(0x04) & 0x0020)) {
231 udelay(100);
232 }
wdenk372f0302004-02-27 08:21:54 +0000233
Grant Likely715a70b2007-02-20 09:05:16 +0100234 /* Read 16 words of 2bytes from the sector buffer. */
235 for (idx = 0; idx < 16; idx += 1) {
236 unsigned short val = ace_readw(0x40);
237 *dp++ = val & 0xff;
238 *dp++ = (val >> 8) & 0xff;
239 }
wdenk372f0302004-02-27 08:21:54 +0000240
Grant Likely715a70b2007-02-20 09:05:16 +0100241 retry -= 1;
242 }
wdenkef893942004-02-23 16:11:30 +0000243
Grant Likely715a70b2007-02-20 09:05:16 +0100244 /* Clear the configruation controller reset */
245 val = ace_readw(0x18);
246 val &= ~0x0080;
247 ace_writew(val, 0x18);
Wolfgang Denkfdb87ed2005-08-07 23:55:50 +0200248
Grant Likely715a70b2007-02-20 09:05:16 +0100249 /* Count the blocks we transfer this time. */
250 start += trans;
251 blk_countdown -= trans;
252 }
wdenkef893942004-02-23 16:11:30 +0000253
Grant Likely715a70b2007-02-20 09:05:16 +0100254 release_cf_lock();
wdenkef893942004-02-23 16:11:30 +0000255
Grant Likely715a70b2007-02-20 09:05:16 +0100256 return blkcnt;
wdenkef893942004-02-23 16:11:30 +0000257}