blob: 0ed00bc88f9efb47ad1866c423b1866ed4366d27 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +02002/*
3 * (C) Copyright 2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +02005 */
6
7/*
8 * This file contains the configuration parameters for qemu-mips64 target.
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020014#define CONFIG_QEMU_MIPS
Daniel Schwierzeckac25adf2014-11-15 23:30:01 +010015
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020016#define CONFIG_TIMESTAMP /* Print image info with timestamp */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020017
18#define CONFIG_EXTRA_ENV_SETTINGS \
19 "addmisc=setenv bootargs ${bootargs} " \
20 "console=ttyS0,${baudrate} " \
21 "panic=1\0" \
22 "bootfile=/tftpboot/vmlinux\0" \
23 "load=tftp ffffffff80500000 ${u-boot}\0" \
24 ""
25
26#define CONFIG_BOOTCOMMAND "bootp;bootelf"
27
28/*
29 * BOOTP options
30 */
31#define CONFIG_BOOTP_BOOTFILESIZE
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020032
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020033#define CONFIG_DRIVER_NE2000
34#define CONFIG_DRIVER_NE2000_BASE 0xffffffffb4000300
35
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020036#define CONFIG_SYS_NS16550_SERIAL
37#define CONFIG_SYS_NS16550_REG_SIZE 1
38#define CONFIG_SYS_NS16550_CLK 115200
39#define CONFIG_SYS_NS16550_COM1 0xffffffffb40003f8
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020040
Stanislav Galabov19030fd2016-02-17 15:23:30 +020041#ifdef CONFIG_SYS_BIG_ENDIAN
42#define CONFIG_IDE_SWAP_IO
43#endif
44
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020045#define CONFIG_SYS_IDE_MAXBUS 2
46#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
47#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
48#define CONFIG_SYS_ATA_DATA_OFFSET 0
49#define CONFIG_SYS_ATA_REG_OFFSET 0
50#define CONFIG_SYS_ATA_BASE_ADDR 0xffffffffb4000000
51
52#define CONFIG_SYS_IDE_MAXDEVICE 4
53
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020054/*
55 * Miscellaneous configurable options
56 */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020057
Kyle Edwards27e5e132017-04-12 22:42:32 -040058#define CONFIG_SYS_MALLOC_LEN (256 << 10)
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020059
60#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
61
62#define CONFIG_SYS_MHZ 132
63
64#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
65
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020066/* Cached addr */
67#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
68
69/* default load address */
70#define CONFIG_SYS_LOAD_ADDR 0xffffffff81000000
71
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020072/*-----------------------------------------------------------------------
73 * FLASH and environment organization
74 */
75/* The following #defines are needed to get flash environment right */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020076#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020077
78#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
79
80/* We boot from this flash, selected with dip switch */
81#define CONFIG_SYS_FLASH_BASE 0xffffffffbfc00000
82#define CONFIG_SYS_MAX_FLASH_BANKS 1
83#define CONFIG_SYS_MAX_FLASH_SECT 128
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020084
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020085/* Address and size of Primary Environment Sector */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020086
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020087#define MEM_SIZE 128
88
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020089#endif /* __CONFIG_H */