blob: eb1ddca600281ec3441e9e512c9abb69a85ac8f7 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vikas Manocha33913c52014-11-18 10:42:22 -08002/*
Patrice Chotardcc551162017-10-23 09:53:59 +02003 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha33913c52014-11-18 10:42:22 -08005 */
6
7#ifndef _STV0991_GPT_H
8#define _STV0991_GPT_H
9
10#include <asm/arch-stv0991/hardware.h>
11
12struct gpt_regs {
13 u32 cr1;
14 u32 cr2;
15 u32 reserved_1;
16 u32 dier; /* dma_int_en */
17 u32 sr; /* status reg */
18 u32 egr; /* event gen */
19 u32 reserved_2[3]; /* offset 0x18--0x20*/
20 u32 cnt;
21 u32 psc;
22 u32 arr;
23};
24
25struct gpt_regs *const gpt1_regs_ptr =
26 (struct gpt_regs *) GPTIMER1_BASE_ADDR;
27
28/* Timer control1 register */
29#define GPT_CR1_CEN 0x0001
30#define GPT_MODE_AUTO_RELOAD (1 << 7)
31
32/* Timer prescalar reg */
33#define GPT_PRESCALER_128 0x128
34
35/* Auto reload register for free running config */
36#define GPT_FREE_RUNNING 0xFFFF
37
38/* Timer, HZ specific defines */
Tom Rini6a5dccc2022-11-16 13:10:41 -050039#define CFG_SYS_HZ_CLOCK ((27 * 1000 * 1000) / GPT_PRESCALER_128)
Vikas Manocha33913c52014-11-18 10:42:22 -080040
41#endif