Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 2 | /* |
Patrice Chotard | cc55116 | 2017-10-23 09:53:59 +0200 | [diff] [blame] | 3 | * Copyright (C) 2014, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _STV0991_GPT_H |
| 8 | #define _STV0991_GPT_H |
| 9 | |
| 10 | #include <asm/arch-stv0991/hardware.h> |
| 11 | |
| 12 | struct gpt_regs { |
| 13 | u32 cr1; |
| 14 | u32 cr2; |
| 15 | u32 reserved_1; |
| 16 | u32 dier; /* dma_int_en */ |
| 17 | u32 sr; /* status reg */ |
| 18 | u32 egr; /* event gen */ |
| 19 | u32 reserved_2[3]; /* offset 0x18--0x20*/ |
| 20 | u32 cnt; |
| 21 | u32 psc; |
| 22 | u32 arr; |
| 23 | }; |
| 24 | |
| 25 | struct gpt_regs *const gpt1_regs_ptr = |
| 26 | (struct gpt_regs *) GPTIMER1_BASE_ADDR; |
| 27 | |
| 28 | /* Timer control1 register */ |
| 29 | #define GPT_CR1_CEN 0x0001 |
| 30 | #define GPT_MODE_AUTO_RELOAD (1 << 7) |
| 31 | |
| 32 | /* Timer prescalar reg */ |
| 33 | #define GPT_PRESCALER_128 0x128 |
| 34 | |
| 35 | /* Auto reload register for free running config */ |
| 36 | #define GPT_FREE_RUNNING 0xFFFF |
| 37 | |
| 38 | /* Timer, HZ specific defines */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame^] | 39 | #define CFG_SYS_HZ_CLOCK ((27 * 1000 * 1000) / GPT_PRESCALER_128) |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 40 | |
| 41 | #endif |