Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ti_omap3_common.h |
| 3 | * |
| 4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | * |
| 8 | * For more details, please see the technical documents listed at |
| 9 | * http://www.ti.com/product/omap3530 |
| 10 | * http://www.ti.com/product/omap3630 |
| 11 | * http://www.ti.com/product/dm3730 |
| 12 | */ |
| 13 | |
| 14 | #ifndef __CONFIG_TI_OMAP3_COMMON_H__ |
| 15 | #define __CONFIG_TI_OMAP3_COMMON_H__ |
| 16 | |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 17 | |
| 18 | #include <asm/arch/cpu.h> |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame^] | 19 | #include <asm/arch/omap.h> |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 20 | |
Simon Glass | bc0f4ea | 2014-10-22 21:37:15 -0600 | [diff] [blame] | 21 | #ifndef CONFIG_SPL_BUILD |
Simon Glass | bc0f4ea | 2014-10-22 21:37:15 -0600 | [diff] [blame] | 22 | # define CONFIG_OMAP_SERIAL |
Simon Glass | bc0f4ea | 2014-10-22 21:37:15 -0600 | [diff] [blame] | 23 | #endif |
| 24 | |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 25 | /* The chip has SDRC controller */ |
| 26 | #define CONFIG_SDRC |
| 27 | |
| 28 | /* Clock Defines */ |
| 29 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 30 | #define V_SCLK (V_OSCK >> 1) |
| 31 | |
| 32 | /* NS16550 Configuration */ |
| 33 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 34 | #define CONFIG_SYS_NS16550 |
Simon Glass | bc0f4ea | 2014-10-22 21:37:15 -0600 | [diff] [blame] | 35 | #ifdef CONFIG_SPL_BUILD |
| 36 | # define CONFIG_SYS_NS16550_SERIAL |
| 37 | # define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 38 | # define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 39 | #endif |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 40 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ |
| 41 | 115200} |
| 42 | |
| 43 | /* Select serial console configuration */ |
| 44 | #define CONFIG_CONS_INDEX 3 |
Simon Glass | bc0f4ea | 2014-10-22 21:37:15 -0600 | [diff] [blame] | 45 | #ifdef CONFIG_SPL_BUILD |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 46 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 47 | #define CONFIG_SERIAL3 3 |
Simon Glass | bc0f4ea | 2014-10-22 21:37:15 -0600 | [diff] [blame] | 48 | #endif |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 49 | |
| 50 | /* Physical Memory Map */ |
| 51 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 52 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 53 | |
| 54 | /* |
| 55 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 56 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 57 | * This rate is divided by a local divisor. |
| 58 | */ |
| 59 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 60 | |
| 61 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
| 62 | |
| 63 | /* TWL4030 */ |
| 64 | #define CONFIG_TWL4030_POWER 1 |
| 65 | |
| 66 | /* SPL */ |
| 67 | #define CONFIG_SPL_TEXT_BASE 0x40200800 |
| 68 | #define CONFIG_SPL_MAX_SIZE (54 * 1024) |
| 69 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
| 70 | #define CONFIG_SPL_POWER_SUPPORT |
Tom Rini | d9f808d | 2014-04-03 07:52:53 -0400 | [diff] [blame] | 71 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
| 72 | (64 << 20)) |
| 73 | |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 74 | |
| 75 | #ifdef CONFIG_NAND |
| 76 | #define CONFIG_SPL_NAND_SUPPORT |
| 77 | #define CONFIG_SPL_NAND_SIMPLE |
Tom Rini | e10247f | 2014-04-03 15:17:15 -0400 | [diff] [blame] | 78 | #define CONFIG_SYS_NAND_BASE 0x30000000 |
Enric Balletbò i Serra | 458d603 | 2013-12-06 21:30:23 +0100 | [diff] [blame] | 79 | #endif |
| 80 | |
| 81 | /* Now bring in the rest of the common code. */ |
| 82 | #include <configs/ti_armv7_common.h> |
| 83 | |
| 84 | #endif /* __CONFIG_TI_OMAP3_COMMON_H__ */ |