Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Michael Schwingen, michael@schwingen.org |
| 4 | * |
| 5 | * Configuration settings for the AcTux-2 board. |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | #define CONFIG_IXP425 1 |
| 30 | #define CONFIG_ACTUX2 1 |
| 31 | |
| 32 | #define CONFIG_DISPLAY_CPUINFO 1 |
| 33 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 34 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 35 | #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 36 | #define CONFIG_BAUDRATE 115200 |
| 37 | #define CONFIG_BOOTDELAY 5 |
| 38 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ |
| 39 | |
| 40 | /*************************************************************** |
| 41 | * U-boot generic defines start here. |
| 42 | ***************************************************************/ |
| 43 | #undef CONFIG_USE_IRQ |
| 44 | |
| 45 | /* Size of malloc() pool */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 46 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 47 | /* size in bytes reserved for initial data */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 48 | #define CONFIG_SYS_GBL_DATA_SIZE 128 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 49 | |
| 50 | /* allow to overwrite serial and ethaddr */ |
| 51 | #define CONFIG_ENV_OVERWRITE |
| 52 | |
| 53 | /* Command line configuration. */ |
| 54 | #include <config_cmd_default.h> |
| 55 | |
| 56 | #define CONFIG_CMD_ELF |
| 57 | #undef CONFIG_CMD_PCI |
| 58 | #undef CONFIG_PCI |
| 59 | |
| 60 | #define CONFIG_BOOTCOMMAND "run boot_flash" |
| 61 | /* enable passing of ATAGs */ |
| 62 | #define CONFIG_CMDLINE_TAG 1 |
| 63 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 64 | #define CONFIG_INITRD_TAG 1 |
| 65 | #define CONFIG_REVISION_TAG 1 |
| 66 | |
| 67 | #if defined(CONFIG_CMD_KGDB) |
| 68 | # define CONFIG_KGDB_BAUDRATE 230400 |
| 69 | /* which serial port to use */ |
| 70 | # define CONFIG_KGDB_SER_INDEX 1 |
| 71 | #endif |
| 72 | |
| 73 | /* Miscellaneous configurable options */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | #define CONFIG_SYS_LONGHELP |
| 75 | #define CONFIG_SYS_PROMPT "=> " |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 76 | /* Console I/O Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #define CONFIG_SYS_CBSIZE 256 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 78 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 79 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 80 | /* max number of command args */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 81 | #define CONFIG_SYS_MAXARGS 16 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 82 | /* Boot Argument Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 83 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 84 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
| 86 | #define CONFIG_SYS_MEMTEST_END 0x00800000 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 87 | |
| 88 | /* everything, incl board info, in Hz */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #undef CONFIG_SYS_CLKS_IN_HZ |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 90 | /* spec says 66.666 MHz, but it appears to be 33 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_HZ 3333333 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 92 | |
| 93 | /* default load address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 94 | #define CONFIG_SYS_LOAD_ADDR 0x00010000 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 95 | |
| 96 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 97 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 98 | 115200, 230400 } |
| 99 | #define CONFIG_SERIAL_RTS_ACTIVE 1 |
| 100 | |
| 101 | /* |
| 102 | * Stack sizes |
| 103 | * The stack sizes are set up in start.S using the settings below |
| 104 | */ |
| 105 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 106 | #ifdef CONFIG_USE_IRQ |
| 107 | # define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 108 | # define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 109 | #endif |
| 110 | |
| 111 | /* Expansion bus settings */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 112 | #define CONFIG_SYS_EXP_CS0 0xbd113042 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 113 | |
| 114 | /* SDRAM settings */ |
| 115 | #define CONFIG_NR_DRAM_BANKS 1 |
| 116 | #define PHYS_SDRAM_1 0x00000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_DRAM_BASE 0x00000000 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 118 | |
| 119 | /* 16MB SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 120 | #define CONFIG_SYS_SDR_CONFIG 0x3A |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 121 | #define PHYS_SDRAM_1_SIZE 0x01000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
| 123 | #define CONFIG_SYS_SDR_MODE_CONFIG 0x1 |
| 124 | #define CONFIG_SYS_DRAM_SIZE 0x01000000 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 125 | |
| 126 | /* FLASH organization */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 128 | /* max number of sectors on one chip */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #define CONFIG_SYS_MAX_FLASH_SECT 140 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 130 | #define PHYS_FLASH_1 0x50000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 131 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 132 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 134 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 |
| 135 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 136 | |
| 137 | /* Use common CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 139 | #define CONFIG_FLASH_CFI_DRIVER |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 140 | /* no byte writes on IXP4xx */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 142 | |
| 143 | /* print 'E' for empty sector on flinfo */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 144 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 145 | |
| 146 | /* Ethernet */ |
| 147 | |
| 148 | /* include IXP4xx NPE support */ |
| 149 | #define CONFIG_IXP4XX_NPE 1 |
| 150 | /* use separate flash sector with ucode images */ |
| 151 | #define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x50040000 |
| 152 | #define CONFIG_NET_MULTI 1 |
| 153 | /* NPE0 PHY address */ |
| 154 | #define CONFIG_PHY_ADDR 0x00 |
| 155 | /* MII PHY management */ |
| 156 | #define CONFIG_MII 1 |
| 157 | /* Number of ethernet rx buffers & descriptors */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 158 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 159 | #define CONFIG_RESET_PHY_R 1 |
| 160 | /* ethernet switch connected to MII port */ |
| 161 | #define CONFIG_MII_ETHSWITCH 1 |
| 162 | |
| 163 | #define CONFIG_CMD_DHCP |
| 164 | #define CONFIG_CMD_NET |
| 165 | #define CONFIG_CMD_MII |
| 166 | #define CONFIG_CMD_PING |
| 167 | #undef CONFIG_CMD_NFS |
| 168 | |
| 169 | /* BOOTP options */ |
| 170 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 171 | #define CONFIG_BOOTP_BOOTPATH |
| 172 | #define CONFIG_BOOTP_GATEWAY |
| 173 | #define CONFIG_BOOTP_HOSTNAME |
| 174 | |
| 175 | /* Cache Configuration */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 176 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 177 | |
| 178 | /* |
| 179 | * environment organization: |
| 180 | * one flash sector, embedded in uboot area (bottom bootblock flash) |
| 181 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 182 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 183 | #define CONFIG_ENV_SIZE 0x2000 |
| 184 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | #define CONFIG_SYS_USE_PPCENV 1 |
Michael Schwingen | 1ae4428 | 2008-01-16 19:51:14 +0100 | [diff] [blame] | 186 | |
| 187 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 188 | "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ |
| 189 | "kerneladdr=50050000\0" \ |
| 190 | "rootaddr=50170000\0" \ |
| 191 | "loadaddr=10000\0" \ |
| 192 | "updateboot_ser=mw.b 10000 ff 40000;" \ |
| 193 | " loady ${loadaddr};" \ |
| 194 | " run eraseboot writeboot\0" \ |
| 195 | "updateboot_net=mw.b 10000 ff 40000;" \ |
| 196 | " tftp ${loadaddr} u-boot.bin;" \ |
| 197 | " run eraseboot writeboot\0" \ |
| 198 | "eraseboot=protect off 50000000 50003fff;" \ |
| 199 | " protect off 50006000 5003ffff;" \ |
| 200 | " erase 50000000 50003fff;" \ |
| 201 | " erase 50006000 5003ffff\0" \ |
| 202 | "writeboot=cp.b 10000 50000000 4000;" \ |
| 203 | " cp.b 16000 50006000 3a000\0" \ |
| 204 | "eraseenv=protect off 50004000 50005fff;" \ |
| 205 | " erase 50004000 50005fff\0" \ |
| 206 | "updateroot=tftp ${loadaddr} ${rootfile};" \ |
| 207 | " era ${rootaddr} +${filesize};" \ |
| 208 | " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ |
| 209 | "updatekern=tftp ${loadaddr} ${kernelfile};" \ |
| 210 | " era ${kerneladdr} +${filesize};" \ |
| 211 | " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ |
| 212 | "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ |
| 213 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 214 | "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ |
| 215 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ |
| 216 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ |
| 217 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ |
| 218 | "boot_flash=run flashargs addtty addeth;" \ |
| 219 | " bootm ${kerneladdr}\0" \ |
| 220 | "boot_net=run netargs addtty addeth;" \ |
| 221 | " tftpboot ${loadaddr} ${kernelfile};" \ |
| 222 | " bootm\0" |
| 223 | |
| 224 | #endif /* __CONFIG_H */ |