Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 |
| 4 | * Alex Marginean, NXP |
| 5 | */ |
| 6 | |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 7 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 8 | #include <log.h> |
Simon Glass | 75c4d41 | 2020-07-19 10:15:37 -0600 | [diff] [blame] | 9 | #include <miiphy.h> |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 10 | #include <misc.h> |
Simon Glass | 75c4d41 | 2020-07-19 10:15:37 -0600 | [diff] [blame] | 11 | #include <dm/test.h> |
| 12 | #include <test/test.h> |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 13 | #include <test/ut.h> |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 14 | |
| 15 | /* macros copied over from mdio_sandbox.c */ |
| 16 | #define SANDBOX_PHY_ADDR 5 |
Alex Marginean | 3336ef6 | 2019-07-12 10:13:52 +0300 | [diff] [blame] | 17 | #define SANDBOX_PHY_REG_CNT 2 |
| 18 | |
| 19 | /* test using 1st register, 0 */ |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 20 | #define SANDBOX_PHY_REG 0 |
| 21 | |
| 22 | #define TEST_REG_VALUE 0xabcd |
| 23 | |
| 24 | static int dm_test_mdio(struct unit_test_state *uts) |
| 25 | { |
| 26 | struct uclass *uc; |
| 27 | struct udevice *dev; |
| 28 | struct mdio_ops *ops; |
| 29 | u16 reg; |
| 30 | |
| 31 | ut_assertok(uclass_get(UCLASS_MDIO, &uc)); |
| 32 | |
| 33 | ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-test", &dev)); |
| 34 | |
| 35 | ops = mdio_get_ops(dev); |
| 36 | ut_assertnonnull(ops); |
| 37 | ut_assertnonnull(ops->read); |
| 38 | ut_assertnonnull(ops->write); |
| 39 | |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 40 | ut_assertok(dm_mdio_write(dev, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE, |
| 41 | SANDBOX_PHY_REG, TEST_REG_VALUE)); |
| 42 | reg = dm_mdio_read(dev, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE, |
| 43 | SANDBOX_PHY_REG); |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 44 | ut_asserteq(reg, TEST_REG_VALUE); |
| 45 | |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 46 | ut_assert(dm_mdio_read(dev, SANDBOX_PHY_ADDR + 1, MDIO_DEVAD_NONE, |
| 47 | SANDBOX_PHY_REG) != 0); |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 48 | |
Marek Behún | e4dedf2 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 49 | ut_assertok(dm_mdio_reset(dev)); |
| 50 | reg = dm_mdio_read(dev, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE, |
| 51 | SANDBOX_PHY_REG); |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 52 | ut_asserteq(reg, 0); |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
Simon Glass | 974dccd | 2020-07-28 19:41:12 -0600 | [diff] [blame] | 57 | DM_TEST(dm_test_mdio, UT_TESTF_SCAN_FDT); |