Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 |
| 4 | * Alex Marginean, NXP |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 9 | #include <log.h> |
Simon Glass | 75c4d41 | 2020-07-19 10:15:37 -0600 | [diff] [blame^] | 10 | #include <miiphy.h> |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 11 | #include <misc.h> |
Simon Glass | 75c4d41 | 2020-07-19 10:15:37 -0600 | [diff] [blame^] | 12 | #include <dm/test.h> |
| 13 | #include <test/test.h> |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 14 | #include <test/ut.h> |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 15 | |
| 16 | /* macros copied over from mdio_sandbox.c */ |
| 17 | #define SANDBOX_PHY_ADDR 5 |
Alex Marginean | 3336ef6 | 2019-07-12 10:13:52 +0300 | [diff] [blame] | 18 | #define SANDBOX_PHY_REG_CNT 2 |
| 19 | |
| 20 | /* test using 1st register, 0 */ |
Alex Marginean | 0daa53a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 21 | #define SANDBOX_PHY_REG 0 |
| 22 | |
| 23 | #define TEST_REG_VALUE 0xabcd |
| 24 | |
| 25 | static int dm_test_mdio(struct unit_test_state *uts) |
| 26 | { |
| 27 | struct uclass *uc; |
| 28 | struct udevice *dev; |
| 29 | struct mdio_ops *ops; |
| 30 | u16 reg; |
| 31 | |
| 32 | ut_assertok(uclass_get(UCLASS_MDIO, &uc)); |
| 33 | |
| 34 | ut_assertok(uclass_get_device_by_name(UCLASS_MDIO, "mdio-test", &dev)); |
| 35 | |
| 36 | ops = mdio_get_ops(dev); |
| 37 | ut_assertnonnull(ops); |
| 38 | ut_assertnonnull(ops->read); |
| 39 | ut_assertnonnull(ops->write); |
| 40 | |
| 41 | ut_assertok(ops->write(dev, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE, |
| 42 | SANDBOX_PHY_REG, TEST_REG_VALUE)); |
| 43 | reg = ops->read(dev, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE, |
| 44 | SANDBOX_PHY_REG); |
| 45 | ut_asserteq(reg, TEST_REG_VALUE); |
| 46 | |
| 47 | ut_assert(ops->read(dev, SANDBOX_PHY_ADDR + 1, MDIO_DEVAD_NONE, |
| 48 | SANDBOX_PHY_REG) != 0); |
| 49 | |
| 50 | ut_assertok(ops->reset(dev)); |
| 51 | reg = ops->read(dev, SANDBOX_PHY_ADDR, MDIO_DEVAD_NONE, |
| 52 | SANDBOX_PHY_REG); |
| 53 | ut_asserteq(reg, 0); |
| 54 | |
| 55 | return 0; |
| 56 | } |
| 57 | |
| 58 | DM_TEST(dm_test_mdio, DM_TESTF_SCAN_FDT); |