blob: a09d39ee23dd74d7a97a2cab607f8d4d464992a6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Albert Aribaudacc41ff2010-06-17 19:38:21 +05302/*
Albert ARIBAUD340983d2011-04-22 19:41:02 +02003 * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert Aribaudacc41ff2010-06-17 19:38:21 +05304 *
5 * Based on original Kirkwood support which is
6 * (C) Copyright 2009
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
Albert Aribaudacc41ff2010-06-17 19:38:21 +05309 */
10
11#ifndef _CONFIG_EDMINIV2_H
12#define _CONFIG_EDMINIV2_H
13
14/*
Albert ARIBAUD2ac37922015-01-31 22:55:38 +010015 * SPL
16 */
17
Albert ARIBAUD2ac37922015-01-31 22:55:38 +010018#define CONFIG_SPL_STACK 0x00020000
19#define CONFIG_SPL_BSS_START_ADDR 0x00020000
Albert ARIBAUD2ac37922015-01-31 22:55:38 +010020#define CONFIG_SYS_SPL_MALLOC_START 0x00040000
21#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
Albert ARIBAUD2ac37922015-01-31 22:55:38 +010022#define CONFIG_SYS_UBOOT_BASE 0xfff90000
23#define CONFIG_SYS_UBOOT_START 0x00800000
Albert ARIBAUD2ac37922015-01-31 22:55:38 +010024
25/*
Albert Aribaudacc41ff2010-06-17 19:38:21 +053026 * High Level Configuration Options (easy to change)
27 */
28
Lei Wen749941a2011-10-24 16:27:32 +000029#include <asm/arch/orion5x.h>
Albert Aribaudacc41ff2010-06-17 19:38:21 +053030/*
31 * CLKs configurations
32 */
33
Albert Aribaudacc41ff2010-06-17 19:38:21 +053034/*
35 * Board-specific values for Orion5x MPP low level init:
36 * - MPPs 12 to 15 are SATA LEDs (mode 5)
37 * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
38 * MPP16 to MPP19, mode 0 for others
39 */
40
41#define ORION5X_MPP0_7 0x00000003
42#define ORION5X_MPP8_15 0x55550000
Albert Aribaud26137d02010-08-08 05:17:06 +053043#define ORION5X_MPP16_23 0x00005555
Albert Aribaudacc41ff2010-06-17 19:38:21 +053044
45/*
46 * Board-specific values for Orion5x GPIO low level init:
47 * - GPIO3 is input (RTC interrupt)
48 * - GPIO16 is Power LED control (0 = on, 1 = off)
49 * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
50 * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
Albert ARIBAUDdea1cfb2012-08-16 06:35:21 +000051 * - GPIO19 is SATA disk power toggle (toggles on 0-to-1)
52 * - GPIO22 is SATA disk power status ()
53 * - GPIO23 is supply status for SATA disk ()
54 * - GPIO24 is supply control for board (write 1 to power off)
55 * Last GPIO is 25, further bits are supposed to be 0.
Albert Aribaudacc41ff2010-06-17 19:38:21 +053056 * Enable mask has ones for INPUT, 0 for OUTPUT.
Albert ARIBAUDdea1cfb2012-08-16 06:35:21 +000057 * Default is LED ON, board ON :)
Albert Aribaudacc41ff2010-06-17 19:38:21 +053058 */
59
Albert ARIBAUDdea1cfb2012-08-16 06:35:21 +000060#define ORION5X_GPIO_OUT_ENABLE 0xfef4f0ca
61#define ORION5X_GPIO_OUT_VALUE 0x00000000
62#define ORION5X_GPIO_IN_POLARITY 0x000000d0
Albert Aribaudacc41ff2010-06-17 19:38:21 +053063
64/*
65 * NS16550 Configuration
66 */
67
Albert Aribaudacc41ff2010-06-17 19:38:21 +053068#define CONFIG_SYS_NS16550_SERIAL
69#define CONFIG_SYS_NS16550_REG_SIZE (-4)
70#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
71#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE
72
73/*
74 * Serial Port configuration
75 * The following definitions let you select what serial you want to use
76 * for your console driver.
77 */
78
Albert Aribaudacc41ff2010-06-17 19:38:21 +053079#define CONFIG_SYS_BAUDRATE_TABLE \
80 { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
81
82/*
83 * FLASH configuration
84 */
85
Albert Aribaudacc41ff2010-06-17 19:38:21 +053086#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
87#define CONFIG_SYS_FLASH_BASE 0xfff80000
Albert Aribaudacc41ff2010-06-17 19:38:21 +053088
89/* auto boot */
Albert Aribaudacc41ff2010-06-17 19:38:21 +053090
Albert Aribaudacc41ff2010-06-17 19:38:21 +053091/*
Albert Aribaudc5b205b2010-07-12 22:24:30 +020092 * Network
Albert Aribaudacc41ff2010-06-17 19:38:21 +053093 */
Albert Aribaudc5b205b2010-07-12 22:24:30 +020094
95#ifdef CONFIG_CMD_NET
Albert Aribaudc5b205b2010-07-12 22:24:30 +020096#define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */
97#define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */
98#define CONFIG_PHY_BASE_ADR 0x8
Albert Aribaudc5b205b2010-07-12 22:24:30 +020099#endif
Albert Aribaudacc41ff2010-06-17 19:38:21 +0530100
101/*
Albert Aribaud26137d02010-08-08 05:17:06 +0530102 * IDE
103 */
Simon Glassb569a012017-05-17 03:25:30 -0600104#ifdef CONFIG_IDE
Albert Aribaud26137d02010-08-08 05:17:06 +0530105#define __io
Albert Aribaud26137d02010-08-08 05:17:06 +0530106/* Data, registers and alternate blocks are at the same offset */
Albert Aribaud26137d02010-08-08 05:17:06 +0530107/* Each 8-bit ATA register is aligned to a 4-bytes address */
Albert Aribaud26137d02010-08-08 05:17:06 +0530108/* Controller supports 48-bits LBA addressing */
109#define CONFIG_LBA48
110/* A single bus, a single device */
Albert Aribaud26137d02010-08-08 05:17:06 +0530111/* ATA registers base is at SATA controller base */
Albert Aribaud26137d02010-08-08 05:17:06 +0530112/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
Albert Aribaud26137d02010-08-08 05:17:06 +0530113/* end of IDE defines */
114#endif /* CMD_IDE */
115
116/*
Albert ARIBAUD90bdece2012-01-15 22:08:41 +0000117 * Common USB/EHCI configuration
118 */
119#ifdef CONFIG_CMD_USB
Albert ARIBAUD90bdece2012-01-15 22:08:41 +0000120#define ORION5X_USB20_HOST_PORT_BASE ORION5X_USB20_PORT0_BASE
Albert ARIBAUD90bdece2012-01-15 22:08:41 +0000121#endif /* CONFIG_CMD_USB */
122
123/*
Albert Aribaud81c99812010-08-27 18:26:06 +0200124 * I2C related stuff
125 */
126#ifdef CONFIG_CMD_I2C
Paul Kocialkowski2fae3e72015-04-10 23:09:51 +0200127#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
Albert Aribaud81c99812010-08-27 18:26:06 +0200128#endif
129
130/*
Albert Aribaudacc41ff2010-06-17 19:38:21 +0530131 * Environment variables configurations
132 */
Albert Aribaudacc41ff2010-06-17 19:38:21 +0530133
Albert ARIBAUDc4d48a62012-02-06 20:32:19 +0530134/* Enable command line editing */
Albert ARIBAUDc4d48a62012-02-06 20:32:19 +0530135
136/* provide extensive help */
Albert ARIBAUDc4d48a62012-02-06 20:32:19 +0530137
Albert Aribauda2ddee42010-10-11 13:13:29 +0200138/* additions for new relocation code, must be added to all boards */
139#define CONFIG_SYS_SDRAM_BASE 0
140#define CONFIG_SYS_INIT_SP_ADDR \
Wolfgang Denk0191e472010-10-26 14:34:52 +0200141 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
Albert Aribauda2ddee42010-10-11 13:13:29 +0200142
Albert Aribaudacc41ff2010-06-17 19:38:21 +0530143#endif /* _CONFIG_EDMINIV2_H */