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Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +05301/*
Michal Simekc1b82162015-08-20 15:21:48 +02002 * Configuration for Xilinx ZynqMP emulation platforms
Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +05303 *
4 * (C) Copyright 2014 - 2015 Xilinx, Inc.
5 * Michal Simek <michal.simek@xilinx.com>
6 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
7 *
8 * Based on Configuration for Versatile Express
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __CONFIG_ZYNQMP_EP_H
14#define __CONFIG_ZYNQMP_EP_H
15
Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +053016#define CONFIG_ZYNQ_EEPROM
Siva Durga Prasad Paladuguee8dc842015-11-16 16:49:23 +053017#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
18 ZYNQMP_USB1_XHCI_BASEADDR}
Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +053019
Michal Simekd48a1702015-11-05 08:32:14 +010020#define COUNTER_FREQUENCY 4000000
21
Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +053022#include <configs/xilinx_zynqmp.h>
23
24#endif /* __CONFIG_ZYNQMP_EP_H */