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git01.mediatek.com / filogic / uboot / f6f05259284dc54f8f114993c2e05a2dad4c4cc8 / . / test / dm / reset.c
blob: 8370820428c38a476cd11c938523693d5514eb1e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]4 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]8#include <malloc.h>
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]9#include <reset.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]10#include <dm/test.h>
11#include <asm/reset.h>
12#include <test/ut.h>
13
14/* This must match the specifier for mbox-names="test" in the DT node */
15#define TEST_RESET_ID 2
16
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]17/* This is the other reset phandle specifier handled by bulk */
18#define OTHER_RESET_ID 2
19
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]20/* Base test of the reset uclass */
21static int dm_test_reset_base(struct unit_test_state *uts)
22{
23 struct udevice *dev;
24 struct reset_ctl reset_method1;
25 struct reset_ctl reset_method2;
26
27 /* Get the device using the reset device */
28 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
29 &dev));
30
31 /* Get the same reset port in 2 different ways and compare */
32 ut_assertok(reset_get_by_index(dev, 1, &reset_method1));
33 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
34 &reset_method2));
35 ut_asserteq(reset_method1.id, reset_method2.id);
36
37 return 0;
38}
39
40DM_TEST(dm_test_reset_base, DM_TESTF_SCAN_FDT);
41
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]42static int dm_test_reset(struct unit_test_state *uts)
43{
44 struct udevice *dev_reset;
45 struct udevice *dev_test;
46
47 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
48 &dev_reset));
49 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
50
51 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
52 &dev_test));
53 ut_assertok(sandbox_reset_test_get(dev_test));
54
55 ut_assertok(sandbox_reset_test_assert(dev_test));
56 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
57
58 ut_assertok(sandbox_reset_test_deassert(dev_test));
59 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
60
61 ut_assertok(sandbox_reset_test_free(dev_test));
62
63 return 0;
64}
65DM_TEST(dm_test_reset, DM_TESTF_SCAN_FDT);
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]66
67static int dm_test_reset_bulk(struct unit_test_state *uts)
68{
69 struct udevice *dev_reset;
70 struct udevice *dev_test;
71
72 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
73 &dev_reset));
74 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
75 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
76
77 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
78 &dev_test));
79 ut_assertok(sandbox_reset_test_get_bulk(dev_test));
80
81 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
82 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
83 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
84
85 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
86 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
87 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
88
89 ut_assertok(sandbox_reset_test_release_bulk(dev_test));
90 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
91 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
92
93 return 0;
94}
95DM_TEST(dm_test_reset_bulk, DM_TESTF_SCAN_FDT);