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git01.mediatek.com / filogic / uboot / f6dbc36c356f2bd3f9a1b35f20479222177cb334 / . / test / dm / clk.c
blob: 790968e64774362d8967845b01b296c528326b99 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]4 */
5
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]6#include <clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]7#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]8#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]9#include <malloc.h>
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]10#include <asm/clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]11#include <dm/test.h>
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]12#include <dm/device-internal.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]13#include <linux/err.h>
Simon Glass75c4d412020-07-19 10:15:37 -0600[diff] [blame]14#include <test/test.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]15#include <test/ut.h>
16
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]17/* Base test of the clk uclass */
18static int dm_test_clk_base(struct unit_test_state *uts)
19{
20 struct udevice *dev;
21 struct clk clk_method1;
22 struct clk clk_method2;
23
24 /* Get the device using the clk device */
25 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
26
27 /* Get the same clk port in 2 different ways and compare */
Samuel Hollandbae0f4f2023-01-21 18:02:51 -0600[diff] [blame]28 ut_assertok(clk_get_by_index(dev, 0, &clk_method1));
29 ut_assertok(clk_get_by_name(dev, NULL, &clk_method2));
30 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
31 ut_asserteq(clk_method1.id, clk_method2.id);
32
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]33 ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
34 ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
Sekhar Noricf3119d2019-08-01 19:12:55 +0530[diff] [blame]35 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]36 ut_asserteq(clk_method1.id, clk_method2.id);
37
Ashok Reddy Soma8f03cef2023-08-30 10:31:42 +0200[diff] [blame]38 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test2", &dev));
39 ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
40
41 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test3", &dev));
42 ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
43
44 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test4", &dev));
45 ut_assertok(clk_set_defaults(dev, CLK_DEFAULTS_PRE));
46
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]47 return 0;
48}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]49DM_TEST(dm_test_clk_base, UTF_SCAN_FDT);
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]50
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]51static int dm_test_clk(struct unit_test_state *uts)
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]52{
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]53 struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]54 ulong rate;
55
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]56 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
57 &dev_fixed));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]58
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]59 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
60 &dev_fixed_factor));
61
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]62 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
63 &dev_clk));
64 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
65 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
66 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
67 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]68
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]69 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
70 &dev_test));
71 ut_assertok(sandbox_clk_test_get(dev_test));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]72 ut_assertok(sandbox_clk_test_devm_get(dev_test));
Fabrice Gasnier11192712018-07-24 16:31:28 +0200[diff] [blame]73 ut_assertok(sandbox_clk_test_valid(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]74
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]75 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
76 SANDBOX_CLK_TEST_ID_DEVM_NULL));
77 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
78 SANDBOX_CLK_TEST_ID_DEVM_NULL,
79 0));
80 ut_asserteq(0, sandbox_clk_test_enable(dev_test,
81 SANDBOX_CLK_TEST_ID_DEVM_NULL));
82 ut_asserteq(0, sandbox_clk_test_disable(dev_test,
83 SANDBOX_CLK_TEST_ID_DEVM_NULL));
84
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]85 ut_asserteq(1234,
86 sandbox_clk_test_get_rate(dev_test,
87 SANDBOX_CLK_TEST_ID_FIXED));
88 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
89 SANDBOX_CLK_TEST_ID_SPI));
90 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
91 SANDBOX_CLK_TEST_ID_I2C));
Jean-Jacques Hiblotc1e9c942019-10-22 14:00:07 +0200[diff] [blame]92 ut_asserteq(321, sandbox_clk_test_get_rate(dev_test,
93 SANDBOX_CLK_TEST_ID_DEVM1));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]94 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
95 SANDBOX_CLK_TEST_ID_DEVM2));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]96
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]97 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
98 12345);
99 ut_assert(IS_ERR_VALUE(rate));
100 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
101 ut_asserteq(1234, rate);
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]102
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]103 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
104 SANDBOX_CLK_TEST_ID_SPI,
105 1000));
106 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
107 SANDBOX_CLK_TEST_ID_I2C,
108 2000));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]109
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]110 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
111 SANDBOX_CLK_TEST_ID_SPI));
112 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
113 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]114
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]115 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
116 SANDBOX_CLK_TEST_ID_SPI,
117 10000));
118 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
119 SANDBOX_CLK_TEST_ID_I2C,
120 20000));
121
122 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
123 ut_assert(IS_ERR_VALUE(rate));
124 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
125 ut_assert(IS_ERR_VALUE(rate));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]126
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]127 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
128 SANDBOX_CLK_TEST_ID_SPI));
129 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
130 SANDBOX_CLK_TEST_ID_I2C));
131
Dario Binacchib7f85892020-12-30 00:06:31 +0100[diff] [blame]132 ut_asserteq(5000, sandbox_clk_test_round_rate(dev_test,
133 SANDBOX_CLK_TEST_ID_SPI,
134 5000));
135 ut_asserteq(7000, sandbox_clk_test_round_rate(dev_test,
136 SANDBOX_CLK_TEST_ID_I2C,
137 7000));
138
139 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
140 SANDBOX_CLK_TEST_ID_SPI));
141 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
142 SANDBOX_CLK_TEST_ID_I2C));
143
144 rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
145 ut_assert(IS_ERR_VALUE(rate));
146 rate = sandbox_clk_test_round_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
147 ut_assert(IS_ERR_VALUE(rate));
148
149 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
150 SANDBOX_CLK_TEST_ID_SPI));
151 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
152 SANDBOX_CLK_TEST_ID_I2C));
153
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]154 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
155 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
156 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
157 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
158
159 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
160 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
161 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
162
163 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
164 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
165 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
166
167 ut_assertok(sandbox_clk_test_disable(dev_test,
168 SANDBOX_CLK_TEST_ID_SPI));
169 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
170 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
171
172 ut_assertok(sandbox_clk_test_disable(dev_test,
173 SANDBOX_CLK_TEST_ID_I2C));
174 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
175 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
176
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]177 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
178 SANDBOX_CLK_ID_SPI));
179 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
180 SANDBOX_CLK_ID_I2C));
181 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
182 SANDBOX_CLK_ID_UART2));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]183
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]184 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
185 SANDBOX_CLK_ID_UART1));
186 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]187 return 0;
188}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]189DM_TEST(dm_test_clk, UTF_SCAN_FDT);
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]190
191static int dm_test_clk_bulk(struct unit_test_state *uts)
192{
193 struct udevice *dev_clk, *dev_test;
194
195 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
196 &dev_clk));
197 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
198 &dev_test));
199 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
200
201 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
202 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
203
204 /* Fixed clock does not support enable, thus should not fail */
205 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
206 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
207 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
208
209 /* Fixed clock does not support disable, thus should not fail */
210 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
211 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
212 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
213
214 /* Fixed clock does not support enable, thus should not fail */
215 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
216 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
217 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
218
219 /* Fixed clock does not support disable, thus should not fail */
220 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
221 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
222 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]223 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]224
225 return 0;
226}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]227DM_TEST(dm_test_clk_bulk, UTF_SCAN_FDT);