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git01.mediatek.com / filogic / uboot / ab127ba6d9b501371948109c2f7104309c2947ca / . / test / dm / clk.c
blob: f301ecbb459db5b2a145a44897de7caca8052407 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]4 */
5
6#include <common.h>
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame^]7#include <clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]8#include <dm.h>
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]9#include <asm/clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]10#include <dm/test.h>
11#include <linux/err.h>
12#include <test/ut.h>
13
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame^]14/* Base test of the clk uclass */
15static int dm_test_clk_base(struct unit_test_state *uts)
16{
17 struct udevice *dev;
18 struct clk clk_method1;
19 struct clk clk_method2;
20
21 /* Get the device using the clk device */
22 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
23
24 /* Get the same clk port in 2 different ways and compare */
25 ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
26 ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
27 ut_asserteq(clk_method1.id, clk_method2.id);
28
29 return 0;
30}
31
32DM_TEST(dm_test_clk_base, DM_TESTF_SCAN_FDT);
33
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]34static int dm_test_clk(struct unit_test_state *uts)
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]35{
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]36 struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]37 ulong rate;
38
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]39 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
40 &dev_fixed));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]41
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]42 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
43 &dev_fixed_factor));
44
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]45 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
46 &dev_clk));
47 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
48 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
49 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
50 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]51
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]52 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
53 &dev_test));
54 ut_assertok(sandbox_clk_test_get(dev_test));
Fabrice Gasnier11192712018-07-24 16:31:28 +0200[diff] [blame]55 ut_assertok(sandbox_clk_test_valid(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]56
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]57 ut_asserteq(1234,
58 sandbox_clk_test_get_rate(dev_test,
59 SANDBOX_CLK_TEST_ID_FIXED));
60 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
61 SANDBOX_CLK_TEST_ID_SPI));
62 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
63 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]64
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]65 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
66 12345);
67 ut_assert(IS_ERR_VALUE(rate));
68 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
69 ut_asserteq(1234, rate);
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]70
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]71 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
72 SANDBOX_CLK_TEST_ID_SPI,
73 1000));
74 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
75 SANDBOX_CLK_TEST_ID_I2C,
76 2000));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]77
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]78 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
79 SANDBOX_CLK_TEST_ID_SPI));
80 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
81 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]82
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]83 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
84 SANDBOX_CLK_TEST_ID_SPI,
85 10000));
86 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
87 SANDBOX_CLK_TEST_ID_I2C,
88 20000));
89
90 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
91 ut_assert(IS_ERR_VALUE(rate));
92 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
93 ut_assert(IS_ERR_VALUE(rate));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]94
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]95 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
96 SANDBOX_CLK_TEST_ID_SPI));
97 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
98 SANDBOX_CLK_TEST_ID_I2C));
99
100 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
101 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
102 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
103 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
104
105 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
106 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
107 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
108
109 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
110 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
111 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
112
113 ut_assertok(sandbox_clk_test_disable(dev_test,
114 SANDBOX_CLK_TEST_ID_SPI));
115 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
116 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
117
118 ut_assertok(sandbox_clk_test_disable(dev_test,
119 SANDBOX_CLK_TEST_ID_I2C));
120 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
121 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
122
123 ut_assertok(sandbox_clk_test_free(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]124
125 return 0;
126}
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]127DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]128
129static int dm_test_clk_bulk(struct unit_test_state *uts)
130{
131 struct udevice *dev_clk, *dev_test;
132
133 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
134 &dev_clk));
135 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
136 &dev_test));
137 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
138
139 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
140 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
141
142 /* Fixed clock does not support enable, thus should not fail */
143 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
144 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
145 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
146
147 /* Fixed clock does not support disable, thus should not fail */
148 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
149 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
150 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
151
152 /* Fixed clock does not support enable, thus should not fail */
153 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
154 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
155 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
156
157 /* Fixed clock does not support disable, thus should not fail */
158 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
159 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
160 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
161
162 return 0;
163}
164DM_TEST(dm_test_clk_bulk, DM_TESTF_SCAN_FDT);