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Heiko Schocherdc5f4e42007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010017#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020019/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020028#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010029
30#define CONFIG_BOARD_EARLY_INIT_R 1
31#define CONFIG_BOARD_EARLY_INIT_F 1
32
Becky Bruce03ea1be2008-05-08 19:02:12 -050033#define CONFIG_HIGH_BATS 1 /* High BATs supported */
34
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010035/*
36 * Serial console configuration
37 */
38#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
39#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020040#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010041
42/*
43 * PCI Mapping:
44 * 0x40000000 - 0x4fffffff - PCI Memory
45 * 0x50000000 - 0x50ffffff - PCI IO Space
46 */
Wolfgang Denk2f7f2d92007-03-08 21:49:27 +010047/*#define CONFIG_PCI */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010048
49#if defined(CONFIG_PCI)
50#define CONFIG_PCI_PNP 1
51#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liew521f97b2008-03-30 01:19:06 -050052#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010053
54#define CONFIG_PCI_MEM_BUS 0x40000000
55#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
56#define CONFIG_PCI_MEM_SIZE 0x10000000
57
58#define CONFIG_PCI_IO_BUS 0x50000000
59#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
60#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010061#endif
62
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020063#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010064
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010065#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020066#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010067
68/* Partitions */
69#define CONFIG_MAC_PARTITION
70#define CONFIG_DOS_PARTITION
71#define CONFIG_ISO_PARTITION
72
73#define CONFIG_TIMESTAMP /* Print image info with timestamp */
74
Jon Loeligerca8b5662007-07-04 22:32:51 -050075
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010076/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050077 * BOOTP options
78 */
79#define CONFIG_BOOTP_BOOTFILESIZE
80#define CONFIG_BOOTP_BOOTPATH
81#define CONFIG_BOOTP_GATEWAY
82#define CONFIG_BOOTP_HOSTNAME
83
84
85/*
Jon Loeligerca8b5662007-07-04 22:32:51 -050086 * Command line configuration.
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010087 */
Jon Loeligerca8b5662007-07-04 22:32:51 -050088#include <config_cmd_default.h>
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010089
Jon Loeligerca8b5662007-07-04 22:32:51 -050090#define CONFIG_CMD_NFS
91#define CONFIG_CMD_SNTP
92
Jon Loeliger140b69c2007-07-10 09:38:02 -050093#if defined(CONFIG_PCI)
94#define CODFIG_CMD_PCI
95#endif
96
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010097
98/*
99 * Autobooting
100 */
101#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
102
103#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +0100104 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100105 "echo"
106
107#undef CONFIG_BOOTARGS
108
109#define CONFIG_EXTRA_ENV_SETTINGS \
110 "netdev=eth0\0" \
111 "nfsargs=setenv bootargs root=/dev/nfs rw " \
112 "nfsroot=${serverip}:${rootpath}\0" \
113 "ramargs=setenv bootargs root=/dev/ram rw\0" \
114 "addip=setenv bootargs ${bootargs} " \
115 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
116 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100117 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100118 "bootm ${kernel_addr}\0" \
119 "flash_self=run ramargs addip;" \
120 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100121 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100122 "${baudrate}\0" \
123 "contyp=ttyS0\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100124 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100125 "bootm\0" \
126 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100127 "bootfile=/tftpboot/jupiter/uImage\0" \
128 ""
129
130#define CONFIG_BOOTCOMMAND "run flash_self"
131
132/*
133 * IPB Bus clocking configuration.
134 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200135#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100136
137#if 0
138/* pass open firmware flat tree */
Grant Likely8d1e6e72007-09-06 09:46:23 -0600139#define CONFIG_OF_LIBFDT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100140#define CONFIG_OF_BOARD_SETUP 1
141
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100142#define OF_CPU "PowerPC,5200@0"
143#define OF_SOC "soc5200@f0000000"
144#define OF_TBCLK (bd->bi_busfreq / 8)
145#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
146#endif
147
148#if 0
149/*
150 * I2C configuration
151 */
152#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100154
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200155#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
156#define CONFIG_SYS_I2C_SLAVE 0x7F
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100157
158/*
159 * EEPROM configuration
160 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200161#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
162#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
163#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
164#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100165#endif
166
167/*
168 * Flash configuration
169 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200170#define CONFIG_SYS_FLASH_BASE 0xFF000000
171#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100172
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200173#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100174
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200175#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100176
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200177#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
178#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100179
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200180#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100181
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200182#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200183#define CONFIG_SYS_FLASH_CFI
184#define CONFIG_SYS_FLASH_EMPTY_INFO
185#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
186#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
187#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100188
189/*
190 * Environment settings
191 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200192#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200193#define CONFIG_ENV_SIZE 0x20000
194#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100195#define CONFIG_ENV_OVERWRITE 1
196
Heiko Schocher162bbec2007-03-13 09:40:59 +0100197/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200198#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
199#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher162bbec2007-03-13 09:40:59 +0100200
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100201/*
202 * Memory map
203 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_MBAR 0xF0000000
205#define CONFIG_SYS_SDRAM_BASE 0x00000000
206#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100207
208/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200210#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100211
212
Wolfgang Denk0191e472010-10-26 14:34:52 +0200213#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100215
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200216#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200217#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
218# define CONFIG_SYS_RAMBOOT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100219#endif
220
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200221#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
222#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
223#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100224
225/*
226 * Ethernet configuration
227 */
228#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -0800229#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100230/*
Ben Warrenbc1b9172009-02-05 23:58:25 -0800231 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100232 */
Ben Warrenbc1b9172009-02-05 23:58:25 -0800233/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100234#define CONFIG_PHY_ADDR 0x00
235
236/*
237 * GPIO configuration
238 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200239#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100240
241/*
242 * Miscellaneous configurable options
243 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200244#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher162bbec2007-03-13 09:40:59 +0100245
246#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200247#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500248#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200249#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100250#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200251#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100252#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200253#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
254#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
255#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100256
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200257#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
258#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
259#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100260
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200261#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100262
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200263#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500264#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200265# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500266#endif
267
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100268/*
269 * Various low-level settings
270 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200271#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
272#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100273
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200274#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
275#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
276#define CONFIG_SYS_BOOTCS_CFG 0x00047801
277#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
278#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100279
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200280#define CONFIG_SYS_CS_BURST 0x00000000
281#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100282
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200283#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100284
285#endif /* __CONFIG_H */