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wdenk4a9cbbe2002-08-27 09:48:53 +00001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk4a9cbbe2002-08-27 09:48:53 +00006 */
7
8#include <common.h>
9#include <74xx_7xx.h>
10#include <asm/processor.h>
11
Wolfgang Denk6405a152006-03-31 18:32:53 +020012DECLARE_GLOBAL_DATA_PTR;
13
roy zang92dda872006-12-01 11:47:36 +080014extern unsigned long get_board_bus_clk (void);
roy zangd136d662006-11-02 18:49:51 +080015
wdenk4a9cbbe2002-08-27 09:48:53 +000016static const int hid1_multipliers_x_10[] = {
17 25, /* 0000 - 2.5x */
18 75, /* 0001 - 7.5x */
19 70, /* 0010 - 7x */
20 10, /* 0011 - bypass */
21 20, /* 0100 - 2x */
22 65, /* 0101 - 6.5x */
23 100, /* 0110 - 10x */
24 45, /* 0111 - 4.5x */
25 30, /* 1000 - 3x */
26 55, /* 1001 - 5.5x */
27 40, /* 1010 - 4x */
28 50, /* 1011 - 5x */
29 80, /* 1100 - 8x */
30 60, /* 1101 - 6x */
31 35, /* 1110 - 3.5x */
32 0 /* 1111 - off */
33};
34
roy zangc20fb882006-12-04 17:54:21 +080035/* PLL_CFG[0:4] table for cpu 7448/7447A/7455/7457 */
36static const int hid1_74xx_multipliers_x_10[] = {
roy zang92dda872006-12-01 11:47:36 +080037 115, /* 00000 - 11.5x */
38 170, /* 00001 - 17x */
39 75, /* 00010 - 7.5x */
40 150, /* 00011 - 15x */
41 70, /* 00100 - 7x */
42 180, /* 00101 - 18x */
43 10, /* 00110 - bypass */
44 200, /* 00111 - 20x */
45 20, /* 01000 - 2x */
46 210, /* 01001 - 21x */
47 65, /* 01010 - 6.5x */
48 130, /* 01011 - 13x */
49 85, /* 01100 - 8.5x */
roy zangc20fb882006-12-04 17:54:21 +080050 240, /* 01101 - 24x */
roy zang92dda872006-12-01 11:47:36 +080051 95, /* 01110 - 9.5x */
52 90, /* 01111 - 9x */
53 30, /* 10000 - 3x */
54 105, /* 10001 - 10.5x */
55 55, /* 10010 - 5.5x */
56 110, /* 10011 - 11x */
57 40, /* 10100 - 4x */
58 100, /* 10101 - 10x */
59 50, /* 10110 - 5x */
60 120, /* 10111 - 12x */
61 80, /* 11000 - 8x */
62 140, /* 11001 - 14x */
63 60, /* 11010 - 6x */
64 160, /* 11011 - 16x */
65 135, /* 11100 - 13.5x */
66 280, /* 11101 - 28x */
67 0, /* 11110 - off */
68 125 /* 11111 - 12.5x */
roy zangd136d662006-11-02 18:49:51 +080069};
70
wdenkaaf48a92003-06-20 23:10:58 +000071static const int hid1_fx_multipliers_x_10[] = {
wdenk5da7f2f2004-01-03 00:43:19 +000072 00, /* 0000 - off */
73 00, /* 0001 - off */
74 10, /* 0010 - bypass */
75 10, /* 0011 - bypass */
76 20, /* 0100 - 2x */
77 25, /* 0101 - 2.5x */
78 30, /* 0110 - 3x */
79 35, /* 0111 - 3.5x */
80 40, /* 1000 - 4x */
81 45, /* 1001 - 4.5x */
82 50, /* 1010 - 5x */
83 55, /* 1011 - 5.5x */
84 60, /* 1100 - 6x */
85 65, /* 1101 - 6.5x */
86 70, /* 1110 - 7x */
87 75, /* 1111 - 7.5 */
88 80, /* 10000 - 8x */
89 85, /* 10001 - 8.5x */
90 90, /* 10010 - 9x */
91 95, /* 10011 - 9.5x */
92 100, /* 10100 - 10x */
93 110, /* 10101 - 11x */
94 120, /* 10110 - 12x */
wdenkaaf48a92003-06-20 23:10:58 +000095};
96
97
wdenk4a9cbbe2002-08-27 09:48:53 +000098/* ------------------------------------------------------------------------- */
99
100/*
101 * Measure CPU clock speed (core clock GCLK1, GCLK2)
102 *
103 * (Approx. GCLK frequency in Hz)
104 */
105
106int get_clocks (void)
107{
wdenk5da7f2f2004-01-03 00:43:19 +0000108 ulong clock = 0;
109
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#ifdef CONFIG_SYS_BUS_CLK
111 gd->bus_clk = CONFIG_SYS_BUS_CLK; /* bus clock is a fixed frequency */
roy zangc20fb882006-12-04 17:54:21 +0800112#else
113 gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */
roy zangd136d662006-11-02 18:49:51 +0800114#endif
115
wdenk5da7f2f2004-01-03 00:43:19 +0000116 /* calculate the clock frequency based upon the CPU type */
117 switch (get_cpu_type()) {
roy zangd136d662006-11-02 18:49:51 +0800118 case CPU_7447A:
119 case CPU_7448:
wdenk5da7f2f2004-01-03 00:43:19 +0000120 case CPU_7455:
121 case CPU_7457:
122 /*
wdenk5da7f2f2004-01-03 00:43:19 +0000123 * Make sure division is done before multiplication to prevent 32-bit
124 * arithmetic overflows which will cause a negative number
125 */
roy zang92dda872006-12-01 11:47:36 +0800126 clock = (gd->bus_clk / 10) *
roy zangc20fb882006-12-04 17:54:21 +0800127 hid1_74xx_multipliers_x_10[(get_hid1 () >> 12) & 0x1F];
wdenk5da7f2f2004-01-03 00:43:19 +0000128 break;
129
130 case CPU_750GX:
131 case CPU_750FX:
Stefan Roesef29d5612009-05-14 07:25:13 +0200132 clock = (gd->bus_clk / 10) *
133 hid1_fx_multipliers_x_10[get_hid1 () >> 27];
wdenk5da7f2f2004-01-03 00:43:19 +0000134 break;
135
136 case CPU_7450:
137 case CPU_740:
138 case CPU_740P:
139 case CPU_745:
140 case CPU_750CX:
141 case CPU_750:
142 case CPU_750P:
143 case CPU_755:
144 case CPU_7400:
145 case CPU_7410:
146 /*
147 * Make sure division is done before multiplication to prevent 32-bit
148 * arithmetic overflows which will cause a negative number
149 */
roy zang92dda872006-12-01 11:47:36 +0800150 clock = (gd->bus_clk / 10) *
151 hid1_multipliers_x_10[get_hid1 () >> 28];
wdenk5da7f2f2004-01-03 00:43:19 +0000152 break;
153
154 case CPU_UNKNOWN:
155 printf ("get_gclk_freq(): unknown CPU type\n");
156 clock = 0;
157 return (1);
158 }
159
wdenk4a9cbbe2002-08-27 09:48:53 +0000160 gd->cpu_clk = clock;
wdenk4a9cbbe2002-08-27 09:48:53 +0000161
162 return (0);
163}
wdenk4a9cbbe2002-08-27 09:48:53 +0000164
165/* ------------------------------------------------------------------------- */