Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / f3cc742367892f67d11049a771336b44d17d3f20 / . / test / dm / clk.c
blob: 48fc3dd714ccd1a369d42641861b71decaadde81 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]4 */
5
6#include <common.h>
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]7#include <clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]8#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]9#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]10#include <malloc.h>
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]11#include <asm/clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]12#include <dm/test.h>
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]13#include <dm/device-internal.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]14#include <linux/err.h>
15#include <test/ut.h>
16
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]17/* Base test of the clk uclass */
18static int dm_test_clk_base(struct unit_test_state *uts)
19{
20 struct udevice *dev;
21 struct clk clk_method1;
22 struct clk clk_method2;
23
24 /* Get the device using the clk device */
25 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
26
27 /* Get the same clk port in 2 different ways and compare */
28 ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
29 ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
Sekhar Noricf3119d2019-08-01 19:12:55 +0530[diff] [blame]30 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]31 ut_asserteq(clk_method1.id, clk_method2.id);
32
33 return 0;
34}
35
36DM_TEST(dm_test_clk_base, DM_TESTF_SCAN_FDT);
37
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]38static int dm_test_clk(struct unit_test_state *uts)
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]39{
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]40 struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]41 ulong rate;
42
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]43 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
44 &dev_fixed));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]45
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]46 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
47 &dev_fixed_factor));
48
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]49 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
50 &dev_clk));
51 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
52 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
53 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
54 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]55
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]56 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
57 &dev_test));
58 ut_assertok(sandbox_clk_test_get(dev_test));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]59 ut_assertok(sandbox_clk_test_devm_get(dev_test));
Fabrice Gasnier11192712018-07-24 16:31:28 +0200[diff] [blame]60 ut_assertok(sandbox_clk_test_valid(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]61
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]62 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
63 SANDBOX_CLK_TEST_ID_DEVM_NULL));
64 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
65 SANDBOX_CLK_TEST_ID_DEVM_NULL,
66 0));
67 ut_asserteq(0, sandbox_clk_test_enable(dev_test,
68 SANDBOX_CLK_TEST_ID_DEVM_NULL));
69 ut_asserteq(0, sandbox_clk_test_disable(dev_test,
70 SANDBOX_CLK_TEST_ID_DEVM_NULL));
71
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]72 ut_asserteq(1234,
73 sandbox_clk_test_get_rate(dev_test,
74 SANDBOX_CLK_TEST_ID_FIXED));
75 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
76 SANDBOX_CLK_TEST_ID_SPI));
77 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
78 SANDBOX_CLK_TEST_ID_I2C));
Jean-Jacques Hiblotc1e9c942019-10-22 14:00:07 +0200[diff] [blame]79 ut_asserteq(321, sandbox_clk_test_get_rate(dev_test,
80 SANDBOX_CLK_TEST_ID_DEVM1));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]81 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
82 SANDBOX_CLK_TEST_ID_DEVM2));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]83
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]84 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
85 12345);
86 ut_assert(IS_ERR_VALUE(rate));
87 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
88 ut_asserteq(1234, rate);
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]89
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]90 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
91 SANDBOX_CLK_TEST_ID_SPI,
92 1000));
93 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
94 SANDBOX_CLK_TEST_ID_I2C,
95 2000));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]96
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]97 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
98 SANDBOX_CLK_TEST_ID_SPI));
99 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
100 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]101
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]102 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
103 SANDBOX_CLK_TEST_ID_SPI,
104 10000));
105 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
106 SANDBOX_CLK_TEST_ID_I2C,
107 20000));
108
109 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
110 ut_assert(IS_ERR_VALUE(rate));
111 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
112 ut_assert(IS_ERR_VALUE(rate));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]113
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]114 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
115 SANDBOX_CLK_TEST_ID_SPI));
116 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
117 SANDBOX_CLK_TEST_ID_I2C));
118
119 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
120 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
121 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
122 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
123
124 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
125 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
126 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
127
128 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
129 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
130 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
131
132 ut_assertok(sandbox_clk_test_disable(dev_test,
133 SANDBOX_CLK_TEST_ID_SPI));
134 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
135 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
136
137 ut_assertok(sandbox_clk_test_disable(dev_test,
138 SANDBOX_CLK_TEST_ID_I2C));
139 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
140 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
141
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]142 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
143 SANDBOX_CLK_ID_SPI));
144 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
145 SANDBOX_CLK_ID_I2C));
146 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
147 SANDBOX_CLK_ID_UART2));
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]148 ut_assertok(sandbox_clk_test_free(dev_test));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]149 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
150 SANDBOX_CLK_ID_SPI));
151 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
152 SANDBOX_CLK_ID_I2C));
153 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
154 SANDBOX_CLK_ID_UART2));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]155
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]156 ut_asserteq(1, sandbox_clk_query_requested(dev_clk,
157 SANDBOX_CLK_ID_UART1));
158 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
159 ut_asserteq(0, sandbox_clk_query_requested(dev_clk,
160 SANDBOX_CLK_ID_UART1));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]161 return 0;
162}
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]163DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]164
165static int dm_test_clk_bulk(struct unit_test_state *uts)
166{
167 struct udevice *dev_clk, *dev_test;
168
169 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
170 &dev_clk));
171 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
172 &dev_test));
173 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
174
175 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
176 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
177
178 /* Fixed clock does not support enable, thus should not fail */
179 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
180 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
181 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
182
183 /* Fixed clock does not support disable, thus should not fail */
184 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
185 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
186 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
187
188 /* Fixed clock does not support enable, thus should not fail */
189 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
190 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
191 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
192
193 /* Fixed clock does not support disable, thus should not fail */
194 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
195 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
196 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
Jean-Jacques Hiblot98e84182019-10-22 14:00:05 +0200[diff] [blame]197 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]198
199 return 0;
200}
201DM_TEST(dm_test_clk_bulk, DM_TESTF_SCAN_FDT);