blob: 60bd706fa2bdb5edf3b3918c1d810a22e13ade17 [file] [log] [blame]
Masahiro Yamada92b8c2f2016-01-12 16:36:38 +09001menu "Clock"
2
Simon Glass36ad2342015-06-23 15:39:15 -06003config CLK
4 bool "Enable clock driver support"
5 depends on DM
6 help
7 This allows drivers to be provided for clock generators, including
8 oscillators and PLLs. Devices can use a common clock API to request
9 a particular clock rate and check on available clocks. Clocks can
10 feed into other clocks in a tree structure, with multiplexers to
11 choose the source for each clock.
12
Masahiro Yamadab16de452015-08-12 07:31:46 +090013config SPL_CLK
Simon Glass36ad2342015-06-23 15:39:15 -060014 bool "Enable clock support in SPL"
15 depends on CLK
16 help
17 The clock subsystem adds a small amount of overhead to the image.
18 If this is acceptable and you have a need to use clock drivers in
19 SPL, enable this option. It might provide a cleaner interface to
20 setting up clocks within SPL, and allows the same drivers to be
21 used as U-Boot proper.
Masahiro Yamada92b8c2f2016-01-12 16:36:38 +090022
Álvaro Fernández Rojasc35611c2017-05-07 20:13:01 +020023config CLK_BCM6345
24 bool "Clock controller driver for BCM6345"
25 depends on CLK && ARCH_BMIPS
26 default y
27 help
28 This clock driver adds support for enabling and disabling peripheral
29 clocks on BCM6345 SoCs. HW has no rate changing capabilities.
30
Paul Burton0399f442016-09-08 07:47:38 +010031config CLK_BOSTON
32 def_bool y if TARGET_BOSTON
33 depends on CLK
34 select REGMAP
35 select SYSCON
36 help
37 Enable this to support the clocks
38
Stefan Herbrechtsmeierf1f88c92017-01-17 16:27:29 +010039config CLK_ZYNQ
40 bool "Enable clock driver support for Zynq"
41 depends on CLK && ARCH_ZYNQ
42 default y
43 help
44 This clock driver adds support for clock realted settings for
45 Zynq platform.
46
Siva Durga Prasad Paladugu468b55f2016-11-15 16:15:41 +053047config CLK_ZYNQMP
48 bool "Enable clock driver support for ZynqMP"
49 depends on ARCH_ZYNQMP
50 help
51 This clock driver adds support for clock realted settings for
52 ZynqMP platform.
53
Stephen Warrene8e3f202016-08-08 11:28:24 -060054source "drivers/clk/tegra/Kconfig"
Masahiro Yamadae4dfb052016-02-02 21:11:32 +090055source "drivers/clk/uniphier/Kconfig"
Thomas Abrahame3fc84c2016-04-23 22:18:09 +053056source "drivers/clk/exynos/Kconfig"
Wenyou Yang8c772bd2016-07-20 17:55:12 +080057source "drivers/clk/at91/Kconfig"
Marek Vasutf3b8bf72017-07-21 23:18:03 +020058source "drivers/clk/renesas/Kconfig"
Masahiro Yamadae4dfb052016-02-02 21:11:32 +090059
Masahiro Yamada92b8c2f2016-01-12 16:36:38 +090060endmenu