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Stefan Roese288ba072016-05-25 08:23:31 +02001/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada CP110 Master.
45 */
46
Stefan Roesec0d8f4e2016-05-25 09:06:29 +020047#include <dt-bindings/comphy/comphy_data.h>
48
Stefan Roese288ba072016-05-25 08:23:31 +020049/ {
50 cp110-master {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
55 ranges;
56
57 config-space {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "simple-bus";
61 interrupt-parent = <&gic>;
62 ranges = <0x0 0x0 0xf2000000 0x2000000>;
63
Thomas Petazzoni24d55a62017-02-20 12:27:25 +010064 cpm_ethernet: ethernet@0 {
65 compatible = "marvell,armada-7k-pp22";
66 reg = <0x0 0x100000>, <0x129000 0xb000>;
67 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>;
68 clock-names = "pp_clk", "gop_clk", "mg_clk";
69 status = "disabled";
70 dma-coherent;
71
72 cpm_eth0: eth0 {
73 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
74 port-id = <0>;
75 gop-port-id = <0>;
76 status = "disabled";
77 };
78
79 cpm_eth1: eth1 {
80 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
81 port-id = <1>;
82 gop-port-id = <2>;
83 status = "disabled";
84 };
85
86 cpm_eth2: eth2 {
87 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
88 port-id = <2>;
89 gop-port-id = <3>;
90 status = "disabled";
91 };
92 };
93
94 cpm_mdio: mdio@12a200 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 compatible = "marvell,orion-mdio";
98 reg = <0x12a200 0x10>;
Alex Margineanf20b01b2019-07-25 12:33:20 +030099 device-name = "cpm-mdio";
Thomas Petazzoni24d55a62017-02-20 12:27:25 +0100100 };
101
Stefan Roese288ba072016-05-25 08:23:31 +0200102 cpm_syscon0: system-controller@440000 {
103 compatible = "marvell,cp110-system-controller0",
104 "syscon";
105 reg = <0x440000 0x1000>;
106 #clock-cells = <2>;
107 core-clock-output-names =
108 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
109 "cpm-core", "cpm-nand-core";
110 gate-clock-output-names =
111 "cpm-audio", "cpm-communit", "cpm-nand",
112 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
113 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
114 "cpm-gop-dp", "none", "cpm-pcie_x10",
115 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
116 "cpm-sata", "cpm-sata-usb", "cpm-main",
117 "cpm-sd-mmc", "none", "none",
118 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
119 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
120 };
121
Konstantin Porotchkinff80bd72016-12-08 12:22:30 +0200122 cpm_pinctl: cpm-pinctl@440000 {
123 compatible = "marvell,mvebu-pinctrl",
Evan Wang14143862018-05-25 14:20:51 +0800124 "marvell,armada-7k-pinctrl",
125 "marvell,armada-8k-cpm-pinctrl";
Konstantin Porotchkinff80bd72016-12-08 12:22:30 +0200126 bank-name ="cp0-110";
127 reg = <0x440000 0x20>;
128 pin-count = <63>;
129 max-func = <0xf>;
130
131 cpm_i2c0_pins: cpm-i2c-pins-0 {
132 marvell,pins = < 37 38 >;
133 marvell,function = <2>;
134 };
Konstantin Porotchkin4ca44b02017-02-08 17:34:12 +0200135 cpm_i2c1_pins: cpm-i2c-pins-1 {
136 marvell,pins = < 35 36 >;
137 marvell,function = <2>;
138 };
Konstantin Porotchkinff80bd72016-12-08 12:22:30 +0200139 cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 {
140 marvell,pins = < 44 45 46 47 48 49 50 51
141 52 53 54 55 >;
142 marvell,function = <1>;
143 };
144 pca0_pins: cpm-pca0_pins {
145 marvell,pins = <62>;
146 marvell,function = <0>;
147 };
148 cpm_sdhci_pins: cpm-sdhi-pins-0 {
149 marvell,pins = < 56 57 58 59 60 61 >;
150 marvell,function = <14>;
151 };
152 cpm_spi0_pins: cpm-spi-pins-0 {
153 marvell,pins = < 13 14 15 16 >;
154 marvell,function = <3>;
155 };
156 };
157
Konstantin Porotchkin0c6b0ba2017-02-08 17:34:11 +0200158 cpm_gpio0: gpio@440100 {
159 compatible = "marvell,orion-gpio";
160 reg = <0x440100 0x40>;
161 ngpios = <32>;
162 gpiobase = <20>;
163 gpio-controller;
164 #gpio-cells = <2>;
165 };
166
167 cpm_gpio1: gpio@440140 {
168 compatible = "marvell,orion-gpio";
169 reg = <0x440140 0x40>;
170 ngpios = <31>;
171 gpiobase = <52>;
172 gpio-controller;
173 #gpio-cells = <2>;
174 };
175
Stefan Roese288ba072016-05-25 08:23:31 +0200176 cpm_sata0: sata@540000 {
177 compatible = "marvell,armada-8k-ahci";
178 reg = <0x540000 0x30000>;
179 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
180 clocks = <&cpm_syscon0 1 15>;
181 status = "disabled";
182 };
183
184 cpm_usb3_0: usb3@500000 {
185 compatible = "marvell,armada-8k-xhci",
186 "generic-xhci";
187 reg = <0x500000 0x4000>;
188 dma-coherent;
189 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
190 clocks = <&cpm_syscon0 1 22>;
191 status = "disabled";
192 };
193
194 cpm_usb3_1: usb3@510000 {
195 compatible = "marvell,armada-8k-xhci",
196 "generic-xhci";
197 reg = <0x510000 0x4000>;
198 dma-coherent;
199 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
200 clocks = <&cpm_syscon0 1 23>;
201 status = "disabled";
202 };
203
204 cpm_spi0: spi@700600 {
205 compatible = "marvell,armada-380-spi";
206 reg = <0x700600 0x50>;
207 #address-cells = <0x1>;
208 #size-cells = <0x0>;
209 cell-index = <1>;
210 clocks = <&cpm_syscon0 0 3>;
211 status = "disabled";
212 };
213
214 cpm_spi1: spi@700680 {
215 compatible = "marvell,armada-380-spi";
216 reg = <0x700680 0x50>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 cell-index = <2>;
220 clocks = <&cpm_syscon0 1 21>;
221 status = "disabled";
222 };
223
224 cpm_i2c0: i2c@701000 {
225 compatible = "marvell,mv78230-i2c";
226 reg = <0x701000 0x20>;
227 #address-cells = <1>;
228 #size-cells = <0>;
229 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
230 clocks = <&cpm_syscon0 1 21>;
231 status = "disabled";
232 };
233
234 cpm_i2c1: i2c@701100 {
235 compatible = "marvell,mv78230-i2c";
236 reg = <0x701100 0x20>;
237 #address-cells = <1>;
238 #size-cells = <0>;
239 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
240 clocks = <&cpm_syscon0 1 21>;
241 status = "disabled";
242 };
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200243
Stefan Roesebef3d032016-10-25 17:35:55 +0200244 cpm_comphy: comphy@441000 {
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200245 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
246 reg = <0x441000 0x8>,
247 <0x120000 0x8>;
248 mux-bitcount = <4>;
249 max-lanes = <6>;
250 };
251
Stefan Roesebef3d032016-10-25 17:35:55 +0200252 cpm_utmi0: utmi@580000 {
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200253 compatible = "marvell,mvebu-utmi-2.6.0";
254 reg = <0x580000 0x1000>, /* utmi-unit */
255 <0x440420 0x4>, /* usb-cfg */
256 <0x440440 0x4>; /* utmi-cfg */
Stefan Roeseb781f572017-04-24 18:45:23 +0300257 utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200258 status = "disabled";
259 };
260
Stefan Roesebef3d032016-10-25 17:35:55 +0200261 cpm_utmi1: utmi@581000 {
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200262 compatible = "marvell,mvebu-utmi-2.6.0";
263 reg = <0x581000 0x1000>, /* utmi-unit */
264 <0x440420 0x4>, /* usb-cfg */
265 <0x440444 0x4>; /* utmi-cfg */
Stefan Roeseb781f572017-04-24 18:45:23 +0300266 utmi-port = <UTMI_PHY_TO_USB3_HOST1>;
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200267 status = "disabled";
268 };
Stefan Roesef55d78c2016-12-09 15:40:05 +0100269
270 cpm_sdhci0: sdhci@780000 {
271 compatible = "marvell,armada-8k-sdhci";
272 reg = <0x780000 0x300>;
273 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
274 dma-coherent;
275 status = "disabled";
276 };
Konstantin Porotchkin546a5462017-04-05 18:22:32 +0300277
278 cpm_nand: nand@720000 {
279 compatible = "marvell,mvebu-pxa3xx-nand";
280 reg = <0x720000 0x100>;
281 #address-cells = <1>;
282
283 clocks = <&cpm_syscon0 1 2>;
284 nand-enable-arbiter;
285 num-cs = <1>;
286 nand-ecc-strength = <4>;
287 nand-ecc-step-size = <512>;
288 status = "disabled";
289 };
290
Stefan Roese288ba072016-05-25 08:23:31 +0200291 };
292
293 cpm_pcie0: pcie@f2600000 {
294 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
295 reg = <0 0xf2600000 0 0x10000>,
296 <0 0xf6f00000 0 0x80000>;
297 reg-names = "ctrl", "config";
298 #address-cells = <3>;
299 #size-cells = <2>;
300 #interrupt-cells = <1>;
301 device_type = "pci";
302 dma-coherent;
303
304 bus-range = <0 0xff>;
305 ranges =
306 /* downstream I/O */
307 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
308 /* non-prefetchable memory */
309 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
310 interrupt-map-mask = <0 0 0 0>;
311 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
312 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
313 num-lanes = <1>;
314 clocks = <&cpm_syscon0 1 13>;
315 status = "disabled";
316 };
317
318 cpm_pcie1: pcie@f2620000 {
319 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
320 reg = <0 0xf2620000 0 0x10000>,
321 <0 0xf7f00000 0 0x80000>;
322 reg-names = "ctrl", "config";
323 #address-cells = <3>;
324 #size-cells = <2>;
325 #interrupt-cells = <1>;
326 device_type = "pci";
327 dma-coherent;
328
329 bus-range = <0 0xff>;
330 ranges =
331 /* downstream I/O */
332 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
333 /* non-prefetchable memory */
334 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
335 interrupt-map-mask = <0 0 0 0>;
336 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
337 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
338
339 num-lanes = <1>;
340 clocks = <&cpm_syscon0 1 11>;
341 status = "disabled";
342 };
343
344 cpm_pcie2: pcie@f2640000 {
345 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
346 reg = <0 0xf2640000 0 0x10000>,
347 <0 0xf8f00000 0 0x80000>;
348 reg-names = "ctrl", "config";
349 #address-cells = <3>;
350 #size-cells = <2>;
351 #interrupt-cells = <1>;
352 device_type = "pci";
353 dma-coherent;
354
355 bus-range = <0 0xff>;
356 ranges =
357 /* downstream I/O */
358 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
359 /* non-prefetchable memory */
360 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
361 interrupt-map-mask = <0 0 0 0>;
362 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
363 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
364
365 num-lanes = <1>;
366 clocks = <&cpm_syscon0 1 12>;
367 status = "disabled";
368 };
369 };
370};