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Stefan Roese288ba072016-05-25 08:23:31 +02001/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada CP110 Master.
45 */
46
Stefan Roesec0d8f4e2016-05-25 09:06:29 +020047#include <dt-bindings/comphy/comphy_data.h>
48
Stefan Roese288ba072016-05-25 08:23:31 +020049/ {
50 cp110-master {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
55 ranges;
56
57 config-space {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "simple-bus";
61 interrupt-parent = <&gic>;
62 ranges = <0x0 0x0 0xf2000000 0x2000000>;
63
64 cpm_syscon0: system-controller@440000 {
65 compatible = "marvell,cp110-system-controller0",
66 "syscon";
67 reg = <0x440000 0x1000>;
68 #clock-cells = <2>;
69 core-clock-output-names =
70 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
71 "cpm-core", "cpm-nand-core";
72 gate-clock-output-names =
73 "cpm-audio", "cpm-communit", "cpm-nand",
74 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
75 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
76 "cpm-gop-dp", "none", "cpm-pcie_x10",
77 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
78 "cpm-sata", "cpm-sata-usb", "cpm-main",
79 "cpm-sd-mmc", "none", "none",
80 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
81 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
82 };
83
Konstantin Porotchkinff80bd72016-12-08 12:22:30 +020084 cpm_pinctl: cpm-pinctl@440000 {
85 compatible = "marvell,mvebu-pinctrl",
86 "marvell,a70x0-pinctrl",
87 "marvell,a80x0-cp0-pinctrl";
88 bank-name ="cp0-110";
89 reg = <0x440000 0x20>;
90 pin-count = <63>;
91 max-func = <0xf>;
92
93 cpm_i2c0_pins: cpm-i2c-pins-0 {
94 marvell,pins = < 37 38 >;
95 marvell,function = <2>;
96 };
97 cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 {
98 marvell,pins = < 44 45 46 47 48 49 50 51
99 52 53 54 55 >;
100 marvell,function = <1>;
101 };
102 pca0_pins: cpm-pca0_pins {
103 marvell,pins = <62>;
104 marvell,function = <0>;
105 };
106 cpm_sdhci_pins: cpm-sdhi-pins-0 {
107 marvell,pins = < 56 57 58 59 60 61 >;
108 marvell,function = <14>;
109 };
110 cpm_spi0_pins: cpm-spi-pins-0 {
111 marvell,pins = < 13 14 15 16 >;
112 marvell,function = <3>;
113 };
114 };
115
Konstantin Porotchkin0c6b0ba2017-02-08 17:34:11 +0200116 cpm_gpio0: gpio@440100 {
117 compatible = "marvell,orion-gpio";
118 reg = <0x440100 0x40>;
119 ngpios = <32>;
120 gpiobase = <20>;
121 gpio-controller;
122 #gpio-cells = <2>;
123 };
124
125 cpm_gpio1: gpio@440140 {
126 compatible = "marvell,orion-gpio";
127 reg = <0x440140 0x40>;
128 ngpios = <31>;
129 gpiobase = <52>;
130 gpio-controller;
131 #gpio-cells = <2>;
132 };
133
Stefan Roese288ba072016-05-25 08:23:31 +0200134 cpm_sata0: sata@540000 {
135 compatible = "marvell,armada-8k-ahci";
136 reg = <0x540000 0x30000>;
137 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
138 clocks = <&cpm_syscon0 1 15>;
139 status = "disabled";
140 };
141
142 cpm_usb3_0: usb3@500000 {
143 compatible = "marvell,armada-8k-xhci",
144 "generic-xhci";
145 reg = <0x500000 0x4000>;
146 dma-coherent;
147 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
148 clocks = <&cpm_syscon0 1 22>;
149 status = "disabled";
150 };
151
152 cpm_usb3_1: usb3@510000 {
153 compatible = "marvell,armada-8k-xhci",
154 "generic-xhci";
155 reg = <0x510000 0x4000>;
156 dma-coherent;
157 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
158 clocks = <&cpm_syscon0 1 23>;
159 status = "disabled";
160 };
161
162 cpm_spi0: spi@700600 {
163 compatible = "marvell,armada-380-spi";
164 reg = <0x700600 0x50>;
165 #address-cells = <0x1>;
166 #size-cells = <0x0>;
167 cell-index = <1>;
168 clocks = <&cpm_syscon0 0 3>;
169 status = "disabled";
170 };
171
172 cpm_spi1: spi@700680 {
173 compatible = "marvell,armada-380-spi";
174 reg = <0x700680 0x50>;
175 #address-cells = <1>;
176 #size-cells = <0>;
177 cell-index = <2>;
178 clocks = <&cpm_syscon0 1 21>;
179 status = "disabled";
180 };
181
182 cpm_i2c0: i2c@701000 {
183 compatible = "marvell,mv78230-i2c";
184 reg = <0x701000 0x20>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
188 clocks = <&cpm_syscon0 1 21>;
189 status = "disabled";
190 };
191
192 cpm_i2c1: i2c@701100 {
193 compatible = "marvell,mv78230-i2c";
194 reg = <0x701100 0x20>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
198 clocks = <&cpm_syscon0 1 21>;
199 status = "disabled";
200 };
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200201
Stefan Roesebef3d032016-10-25 17:35:55 +0200202 cpm_comphy: comphy@441000 {
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200203 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
204 reg = <0x441000 0x8>,
205 <0x120000 0x8>;
206 mux-bitcount = <4>;
207 max-lanes = <6>;
208 };
209
Stefan Roesebef3d032016-10-25 17:35:55 +0200210 cpm_utmi0: utmi@580000 {
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200211 compatible = "marvell,mvebu-utmi-2.6.0";
212 reg = <0x580000 0x1000>, /* utmi-unit */
213 <0x440420 0x4>, /* usb-cfg */
214 <0x440440 0x4>; /* utmi-cfg */
215 utmi-port = <UTMI_PHY_TO_USB_HOST0>;
216 status = "disabled";
217 };
218
Stefan Roesebef3d032016-10-25 17:35:55 +0200219 cpm_utmi1: utmi@581000 {
Stefan Roesec0d8f4e2016-05-25 09:06:29 +0200220 compatible = "marvell,mvebu-utmi-2.6.0";
221 reg = <0x581000 0x1000>, /* utmi-unit */
222 <0x440420 0x4>, /* usb-cfg */
223 <0x440444 0x4>; /* utmi-cfg */
224 utmi-port = <UTMI_PHY_TO_USB_HOST1>;
225 status = "disabled";
226 };
Stefan Roesef55d78c2016-12-09 15:40:05 +0100227
228 cpm_sdhci0: sdhci@780000 {
229 compatible = "marvell,armada-8k-sdhci";
230 reg = <0x780000 0x300>;
231 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
232 dma-coherent;
233 status = "disabled";
234 };
Stefan Roese288ba072016-05-25 08:23:31 +0200235 };
236
237 cpm_pcie0: pcie@f2600000 {
238 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
239 reg = <0 0xf2600000 0 0x10000>,
240 <0 0xf6f00000 0 0x80000>;
241 reg-names = "ctrl", "config";
242 #address-cells = <3>;
243 #size-cells = <2>;
244 #interrupt-cells = <1>;
245 device_type = "pci";
246 dma-coherent;
247
248 bus-range = <0 0xff>;
249 ranges =
250 /* downstream I/O */
251 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
252 /* non-prefetchable memory */
253 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
254 interrupt-map-mask = <0 0 0 0>;
255 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
256 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
257 num-lanes = <1>;
258 clocks = <&cpm_syscon0 1 13>;
259 status = "disabled";
260 };
261
262 cpm_pcie1: pcie@f2620000 {
263 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
264 reg = <0 0xf2620000 0 0x10000>,
265 <0 0xf7f00000 0 0x80000>;
266 reg-names = "ctrl", "config";
267 #address-cells = <3>;
268 #size-cells = <2>;
269 #interrupt-cells = <1>;
270 device_type = "pci";
271 dma-coherent;
272
273 bus-range = <0 0xff>;
274 ranges =
275 /* downstream I/O */
276 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
277 /* non-prefetchable memory */
278 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
279 interrupt-map-mask = <0 0 0 0>;
280 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
281 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
282
283 num-lanes = <1>;
284 clocks = <&cpm_syscon0 1 11>;
285 status = "disabled";
286 };
287
288 cpm_pcie2: pcie@f2640000 {
289 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
290 reg = <0 0xf2640000 0 0x10000>,
291 <0 0xf8f00000 0 0x80000>;
292 reg-names = "ctrl", "config";
293 #address-cells = <3>;
294 #size-cells = <2>;
295 #interrupt-cells = <1>;
296 device_type = "pci";
297 dma-coherent;
298
299 bus-range = <0 0xff>;
300 ranges =
301 /* downstream I/O */
302 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
303 /* non-prefetchable memory */
304 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
305 interrupt-map-mask = <0 0 0 0>;
306 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
307 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
308
309 num-lanes = <1>;
310 clocks = <&cpm_syscon0 1 12>;
311 status = "disabled";
312 };
313 };
314};