Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_K3=y |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
| 4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 6 | CONFIG_NR_DRAM_BANKS=2 |
| 7 | CONFIG_SOC_K3_AM625=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 8 | CONFIG_TARGET_AM625_A53_EVM=y |
Tom Rini | 9924ca1 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 9 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
Nikhil M Jain | d0699df | 2023-04-10 14:19:10 +0530 | [diff] [blame] | 10 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000 |
Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 11 | CONFIG_SF_DEFAULT_SPEED=25000000 |
Sjoerd Simons | 05b6186 | 2022-12-20 16:21:44 +0100 | [diff] [blame] | 12 | CONFIG_SPL_DM_SPI=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 13 | CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" |
| 14 | CONFIG_SPL_TEXT_BASE=0x80080000 |
Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 15 | CONFIG_OF_LIBFDT_OVERLAY=y |
Tom Rini | 9924ca1 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 16 | CONFIG_DM_RESET=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 17 | CONFIG_SPL_MMC=y |
| 18 | CONFIG_SPL_SERIAL=y |
| 19 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
Jonathan Humphreys | 0ad2e9d | 2024-04-08 16:10:56 -0500 | [diff] [blame] | 20 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 21 | CONFIG_SPL_BSS_START_ADDR=0x80c80000 |
| 22 | CONFIG_SPL_BSS_MAX_SIZE=0x80000 |
| 23 | CONFIG_SPL_STACK_R=y |
Nikhil M Jain | d0699df | 2023-04-10 14:19:10 +0530 | [diff] [blame] | 24 | CONFIG_SPL_SIZE_LIMIT=0x40000 |
| 25 | CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800 |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 26 | CONFIG_SPL_FS_FAT=y |
| 27 | CONFIG_SPL_LIBDISK_SUPPORT=y |
Sjoerd Simons | 05b6186 | 2022-12-20 16:21:44 +0100 | [diff] [blame] | 28 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 29 | CONFIG_SPL_SPI=y |
Jan Kiszka | 262b690 | 2023-08-25 13:03:01 -0500 | [diff] [blame] | 30 | # CONFIG_PSCI_RESET is not set |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 31 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| 32 | CONFIG_SPL_LOAD_FIT=y |
| 33 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 |
Nishanth Menon | 4b2a141 | 2023-08-25 13:02:52 -0500 | [diff] [blame] | 34 | CONFIG_BOOTSTD_FULL=y |
Tom Rini | 914a8c0 | 2024-01-03 09:26:16 -0500 | [diff] [blame] | 35 | CONFIG_SYS_BOOTM_LEN=0x800000 |
Martyn Welch | 322e473 | 2024-03-26 14:26:33 +0000 | [diff] [blame] | 36 | CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb" |
Nishanth Menon | 6850daf | 2024-02-12 13:47:19 -0600 | [diff] [blame] | 37 | CONFIG_BOARD_LATE_INIT=y |
Manorit Chawdhry | c0d1bf8 | 2023-07-25 13:09:18 +0530 | [diff] [blame] | 38 | CONFIG_SPL_MAX_SIZE=0x58000 |
Nikhil M Jain | d0699df | 2023-04-10 14:19:10 +0530 | [diff] [blame] | 39 | CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 40 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 41 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| 42 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 |
| 43 | CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" |
| 44 | CONFIG_SPL_DM_MAILBOX=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 45 | CONFIG_SPL_DM_SPI_FLASH=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 46 | CONFIG_SPL_POWER_DOMAIN=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 47 | # CONFIG_SPL_SPI_FLASH_TINY is not set |
| 48 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 49 | CONFIG_SPL_SPI_LOAD=y |
| 50 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 51 | CONFIG_SPL_YMODEM_SUPPORT=y |
Jonathan Humphreys | 3559a61 | 2024-04-08 16:10:57 -0500 | [diff] [blame] | 52 | CONFIG_CMD_BOOTEFI_SELFTEST=y |
| 53 | CONFIG_CMD_NVEDIT_EFI=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 54 | CONFIG_CMD_MMC=y |
Judith Mendez | 3ba1b8c | 2024-03-19 13:43:43 -0500 | [diff] [blame] | 55 | CONFIG_MMC_SPEED_MODE_SET=y |
Jonathan Humphreys | 3559a61 | 2024-04-08 16:10:57 -0500 | [diff] [blame] | 56 | CONFIG_CMD_EFIDEBUG=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 57 | CONFIG_OF_CONTROL=y |
| 58 | CONFIG_SPL_OF_CONTROL=y |
| 59 | CONFIG_MULTI_DTB_FIT=y |
| 60 | CONFIG_SPL_MULTI_DTB_FIT=y |
| 61 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y |
| 62 | CONFIG_NET_RANDOM_ETHADDR=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 63 | CONFIG_SPL_DM=y |
| 64 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 65 | CONFIG_REGMAP=y |
| 66 | CONFIG_SPL_REGMAP=y |
| 67 | CONFIG_SPL_OF_TRANSLATE=y |
| 68 | CONFIG_CLK=y |
| 69 | CONFIG_SPL_CLK=y |
| 70 | CONFIG_CLK_TI_SCI=y |
Sjoerd Simons | e3a4b37 | 2022-12-20 16:21:46 +0100 | [diff] [blame] | 71 | CONFIG_DMA_CHANNELS=y |
| 72 | CONFIG_TI_K3_NAVSS_UDMA=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 73 | CONFIG_TI_SCI_PROTOCOL=y |
| 74 | CONFIG_DM_MAILBOX=y |
| 75 | CONFIG_K3_SEC_PROXY=y |
Nishanth Menon | cb89751 | 2023-08-25 13:02:59 -0500 | [diff] [blame] | 76 | CONFIG_SUPPORT_EMMC_BOOT=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 77 | CONFIG_MMC_SDHCI=y |
| 78 | CONFIG_MMC_SDHCI_ADMA=y |
| 79 | CONFIG_SPL_MMC_SDHCI_ADMA=y |
| 80 | CONFIG_MMC_SDHCI_AM654=y |
Tom Rini | ddb1ec1 | 2024-01-10 13:46:10 -0500 | [diff] [blame] | 81 | CONFIG_MTD=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 82 | CONFIG_DM_SPI_FLASH=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 83 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y |
| 84 | CONFIG_SPI_FLASH_SOFT_RESET=y |
| 85 | CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y |
| 86 | CONFIG_SPI_FLASH_SPANSION=y |
Sjoerd Simons | e6cc041 | 2022-12-20 16:21:43 +0100 | [diff] [blame] | 87 | CONFIG_SPI_FLASH_S28HX_T=y |
Sjoerd Simons | e3a4b37 | 2022-12-20 16:21:46 +0100 | [diff] [blame] | 88 | CONFIG_PHY_TI_DP83867=y |
| 89 | CONFIG_PHY_FIXED=y |
| 90 | CONFIG_TI_AM65_CPSW_NUSS=y |
| 91 | CONFIG_PHY=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 92 | CONFIG_PINCTRL=y |
| 93 | CONFIG_SPL_PINCTRL=y |
| 94 | CONFIG_PINCTRL_SINGLE=y |
| 95 | CONFIG_POWER_DOMAIN=y |
| 96 | CONFIG_TI_SCI_POWER_DOMAIN=y |
| 97 | CONFIG_K3_SYSTEM_CONTROLLER=y |
| 98 | CONFIG_REMOTEPROC_TI_K3_ARM64=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 99 | CONFIG_RESET_TI_SCI=y |
Jonathan Humphreys | 4f23b54 | 2024-04-08 16:10:58 -0500 | [diff] [blame] | 100 | CONFIG_DM_RTC=y |
| 101 | CONFIG_RTC_EMULATION=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 102 | CONFIG_DM_SERIAL=y |
| 103 | CONFIG_SOC_DEVICE=y |
| 104 | CONFIG_SOC_DEVICE_TI_K3=y |
| 105 | CONFIG_SOC_TI=y |
Dhruva Gole | c52e8d3 | 2022-10-27 20:23:11 +0530 | [diff] [blame] | 106 | CONFIG_SPI=y |
| 107 | CONFIG_DM_SPI=y |
| 108 | CONFIG_CADENCE_QSPI=y |
Vignesh Raghavendra | bf9bca7 | 2022-05-25 13:38:49 +0530 | [diff] [blame] | 109 | CONFIG_SYSRESET=y |
| 110 | CONFIG_SPL_SYSRESET=y |
| 111 | CONFIG_SYSRESET_TI_SCI=y |
| 112 | CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 |
Jonathan Humphreys | 4f23b54 | 2024-04-08 16:10:58 -0500 | [diff] [blame] | 113 | CONFIG_EFI_SET_TIME=y |