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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Lokesh Vutla3e716e22013-02-17 23:34:35 +00002/*
3 * (C) Copyright 2013
4 * Texas Instruments Incorporated.
5 * Lokesh Vutla <lokeshvutla@ti.com>
6 *
7 * Configuration settings for the TI DRA7XX board.
Enric Balletbò i Serra2785bb72013-12-06 21:30:19 +01008 * See ti_omap5_common.h for omap5 common settings.
Lokesh Vutla3e716e22013-02-17 23:34:35 +00009 */
10
11#ifndef __CONFIG_DRA7XX_EVM_H
12#define __CONFIG_DRA7XX_EVM_H
13
Sekhar Noribb018cf2016-11-25 14:25:54 +053014#include <environment/ti/dfu.h>
15
Lokesh Vutla1fd80222015-06-04 16:42:38 +053016#define CONFIG_IODELAY_RECALIBRATION
Lokesh Vutla1fd80222015-06-04 16:42:38 +053017
Lokesh Vutla18608172016-03-08 09:18:07 +053018#define CONFIG_VERY_BIG_RAM
Lokesh Vutla18608172016-03-08 09:18:07 +053019#define CONFIG_MAX_MEM_MAPPED 0x80000000
20
Tom Rini560ef452014-04-03 07:52:56 -040021#ifndef CONFIG_QSPI_BOOT
Lokesh Vutlaf8c725e2013-08-23 17:27:04 +053022/* MMC ENV related defines */
Lokesh Vutlaf8c725e2013-08-23 17:27:04 +053023#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */
Lokesh Vutlaf8c725e2013-08-23 17:27:04 +053024#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
25#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
Tom Rini560ef452014-04-03 07:52:56 -040026#endif
Lokesh Vutla3e716e22013-02-17 23:34:35 +000027
Minal Shah01ae8ca2013-10-04 14:52:02 -040028#if (CONFIG_CONS_INDEX == 1)
Sam Protsenko02c005f2019-07-12 20:38:12 +030029#define CONSOLEDEV "ttyS0"
Minal Shah01ae8ca2013-10-04 14:52:02 -040030#elif (CONFIG_CONS_INDEX == 3)
Sam Protsenko02c005f2019-07-12 20:38:12 +030031#define CONSOLEDEV "ttyS2"
Minal Shah01ae8ca2013-10-04 14:52:02 -040032#endif
33#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
34#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
35#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
Lokesh Vutla16523262013-05-30 03:19:38 +000036
Simon Glass4590d4e2017-05-17 03:25:10 -060037#define CONFIG_ENV_EEPROM_IS_ON_I2C
38#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
39#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
40
Lokesh Vutla16523262013-05-30 03:19:38 +000041#define CONFIG_SYS_OMAP_ABE_SYSCK
Dan Murphya6f9d152013-06-11 11:22:30 -050042
Tom Riniaed1ba12015-06-12 20:52:29 -040043#ifndef CONFIG_SPL_BUILD
Kishon Vijay Abraham I24080762015-02-23 18:40:20 +053044#define DFUARGS \
45 "dfu_bufsiz=0x10000\0" \
46 DFU_ALT_INFO_MMC \
47 DFU_ALT_INFO_EMMC \
Vignesh R1bf06342015-10-20 15:22:01 +053048 DFU_ALT_INFO_RAM \
49 DFU_ALT_INFO_QSPI
Tom Riniaed1ba12015-06-12 20:52:29 -040050#endif
Dileep Kattaf2731292015-03-25 04:04:50 +053051
B, Ravie0552472016-07-28 17:39:18 +053052#ifdef CONFIG_SPL_BUILD
53#undef CONFIG_CMD_BOOTD
Andrew F. Davis6d932e62019-01-17 13:43:02 -060054#ifdef CONFIG_SPL_DFU
B, Ravie0552472016-07-28 17:39:18 +053055#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
B, Ravie0552472016-07-28 17:39:18 +053056#define DFUARGS \
57 "dfu_bufsiz=0x10000\0" \
58 DFU_ALT_INFO_RAM
59#endif
60#endif
61
Enric Balletbò i Serra2785bb72013-12-06 21:30:19 +010062#include <configs/ti_omap5_common.h>
Dan Murphya6f9d152013-06-11 11:22:30 -050063
Tom Rinifce0d592014-01-21 17:15:08 -050064/* Enhance our eMMC support / experience. */
Lubomir Popov6d2f9852014-11-10 18:14:18 +020065#define CONFIG_HSMMC2_8BIT
Tom Rinifce0d592014-01-21 17:15:08 -050066
Mugunthan V N85ae8be2013-07-08 16:04:43 +053067/* CPSW Ethernet */
Mugunthan V N85ae8be2013-07-08 16:04:43 +053068#define CONFIG_BOOTP_DNS2
69#define CONFIG_BOOTP_SEND_HOSTNAME
Tom Rini243df4a2013-08-20 08:53:54 -040070#define CONFIG_NET_RETRY_COUNT 10
Dan Murphyb1941f32016-03-30 12:58:37 -050071#define CONFIG_PHY_TI
Mugunthan V N85ae8be2013-07-08 16:04:43 +053072
Tom Rini560ef452014-04-03 07:52:56 -040073/*
74 * Default to using SPI for environment, etc.
B, Raviacd0cab2016-09-26 18:21:13 +053075 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
Tom Rini560ef452014-04-03 07:52:56 -040076 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
77 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
78 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
79 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
80 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
81 * 0x9E0000 - 0x2000000 : USERLAND
82 */
83#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
84#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
85#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
86#if defined(CONFIG_QSPI_BOOT)
Tom Rini560ef452014-04-03 07:52:56 -040087#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
Tom Rini560ef452014-04-03 07:52:56 -040088#define CONFIG_ENV_SIZE (64 << 10)
89#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
90#define CONFIG_ENV_OFFSET 0x1C0000
91#define CONFIG_ENV_OFFSET_REDUND 0x1D0000
92#endif
93
Matt Porterbb1a8472013-10-07 15:53:03 +053094/* SPI SPL */
Matt Porterbb1a8472013-10-07 15:53:03 +053095
Dan Murphy69521c12013-10-11 12:28:17 -050096/* USB xHCI HOST */
Dan Murphy69521c12013-10-11 12:28:17 -050097#define CONFIG_USB_XHCI_OMAP
Dan Murphy69521c12013-10-11 12:28:17 -050098
Dan Murphy69521c12013-10-11 12:28:17 -050099#define CONFIG_OMAP_USB2PHY2_HOST
100
Roger Quadrosf019ee82013-11-11 16:56:44 +0200101/* SATA */
Roger Quadrosf019ee82013-11-11 16:56:44 +0200102#define CONFIG_SCSI_AHCI_PLAT
Roger Quadrosf019ee82013-11-11 16:56:44 +0200103
pekon gupta64733cc2014-07-22 16:03:23 +0530104/* NAND support */
105#ifdef CONFIG_NAND
106/* NAND: device related configs */
107#define CONFIG_SYS_NAND_PAGE_SIZE 2048
108#define CONFIG_SYS_NAND_OOBSIZE 64
109#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
pekon gupta64733cc2014-07-22 16:03:23 +0530110#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
111 CONFIG_SYS_NAND_PAGE_SIZE)
112#define CONFIG_SYS_NAND_5_ADDR_CYCLE
113/* NAND: driver related configs */
pekon gupta64733cc2014-07-22 16:03:23 +0530114#define CONFIG_SYS_NAND_ONFI_DETECTION
115#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
116#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
117#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
118 10, 11, 12, 13, 14, 15, 16, 17, \
119 18, 19, 20, 21, 22, 23, 24, 25, \
120 26, 27, 28, 29, 30, 31, 32, 33, \
121 34, 35, 36, 37, 38, 39, 40, 41, \
122 42, 43, 44, 45, 46, 47, 48, 49, \
123 50, 51, 52, 53, 54, 55, 56, 57, }
124#define CONFIG_SYS_NAND_ECCSIZE 512
125#define CONFIG_SYS_NAND_ECCBYTES 14
Faiz Abbas1c2f44d2019-02-27 13:29:38 +0530126#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00140000
pekon gupta64733cc2014-07-22 16:03:23 +0530127/* NAND: SPL related configs */
pekon gupta64733cc2014-07-22 16:03:23 +0530128/* NAND: SPL falcon mode configs */
129#ifdef CONFIG_SPL_OS_BOOT
pekon gupta64733cc2014-07-22 16:03:23 +0530130#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
pekon gupta64733cc2014-07-22 16:03:23 +0530131#endif
132#endif /* !CONFIG_NAND */
133
pekon gupta01663492014-07-22 16:03:24 +0530134/* Parallel NOR Support */
135#if defined(CONFIG_NOR)
136/* NOR: device related configs */
137#define CONFIG_SYS_MAX_FLASH_SECT 512
138#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
139#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */
140/* #define CONFIG_INIT_IGNORE_ERROR */
pekon gupta01663492014-07-22 16:03:24 +0530141#define CONFIG_SYS_MAX_FLASH_BANKS 1
142#define CONFIG_SYS_FLASH_BASE (0x08000000)
143#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
144/* Reduce SPL size by removing unlikey targets */
145#ifdef CONFIG_NOR_BOOT
pekon gupta01663492014-07-22 16:03:24 +0530146#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */
pekon gupta01663492014-07-22 16:03:24 +0530147#define CONFIG_ENV_OFFSET 0x001c0000
148#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
149#endif
150#endif /* NOR support */
151
Lokesh Vutla3e716e22013-02-17 23:34:35 +0000152#endif /* __CONFIG_DRA7XX_EVM_H */