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git01.mediatek.com / filogic / uboot / f25cacc7ec09c815b6f7107785c715e8b2007f71 / . / arch / arm / dts / tegra30-cardhu.dts
blob: 7534861e40d9f47203d3e669ddd5d58f7bc734a9 [file] [log] [blame]
Tom Warrenaa35e1e2012-12-11 13:34:16 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]3#include "tegra30.dtsi"
Tom Warrenaa35e1e2012-12-11 13:34:16 +0000[diff] [blame]4
5/ {
6 model = "NVIDIA Cardhu";
7 compatible = "nvidia,cardhu", "nvidia,tegra30";
8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uarta;
11 };
12
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]13 aliases {
14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c400";
17 i2c3 = "/i2c@7000c500";
18 i2c4 = "/i2c@7000c700";
Stephen Warrend55aadc2016-09-13 10:45:43 -0600[diff] [blame]19 mmc0 = "/sdhci@78000600";
20 mmc1 = "/sdhci@78000000";
Simon Glassb4381ee2014-10-13 23:42:12 -0600[diff] [blame]21 spi0 = "/spi@7000da00";
Jim Lindfed30e2013-06-21 19:05:46 +0800[diff] [blame]22 usb0 = "/usb@7d008000";
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]23 };
24
Tom Warrenaa35e1e2012-12-11 13:34:16 +0000[diff] [blame]25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x40000000>;
28 };
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]29
Thierry Reding2afec172019-04-15 11:32:37 +0200[diff] [blame]30 pcie@3000 {
Thierry Reding0a5ffb02014-12-09 22:25:17 -0700[diff] [blame]31 status = "okay";
32
33 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
34 avdd-pexb-supply = <&ldo1_reg>;
35 vdd-pexb-supply = <&ldo1_reg>;
36 avdd-pex-pll-supply = <&ldo1_reg>;
37 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
38 vddio-pex-ctl-supply = <&sys_3v3_reg>;
39 avdd-plle-supply = <&ldo2_reg>;
40
41 pci@1,0 {
42 nvidia,num-lanes = <4>;
43 };
44
45 pci@2,0 {
46 nvidia,num-lanes = <1>;
47 };
48
49 pci@3,0 {
50 status = "okay";
51 nvidia,num-lanes = <1>;
52 };
53 };
54
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]55 i2c@7000c000 {
Tom Warrene8cf3dd2013-02-21 13:33:23 +0000[diff] [blame]56 status = "okay";
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]57 clock-frequency = <100000>;
58 };
59
60 i2c@7000c400 {
Tom Warrene8cf3dd2013-02-21 13:33:23 +0000[diff] [blame]61 status = "okay";
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]62 clock-frequency = <100000>;
63 };
64
65 i2c@7000c500 {
Tom Warrene8cf3dd2013-02-21 13:33:23 +0000[diff] [blame]66 status = "okay";
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]67 clock-frequency = <100000>;
68 };
69
70 i2c@7000c700 {
Tom Warrene8cf3dd2013-02-21 13:33:23 +0000[diff] [blame]71 status = "okay";
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]72 clock-frequency = <100000>;
73 };
74
75 i2c@7000d000 {
Tom Warrene8cf3dd2013-02-21 13:33:23 +0000[diff] [blame]76 status = "okay";
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]77 clock-frequency = <100000>;
Thierry Reding0a5ffb02014-12-09 22:25:17 -0700[diff] [blame]78
79 pmic: tps65911@2d {
80 compatible = "ti,tps65911";
81 reg = <0x2d>;
82
83 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
84 #interrupt-cells = <2>;
85 interrupt-controller;
86
87 ti,system-power-controller;
88
89 #gpio-cells = <2>;
90 gpio-controller;
91
92 vcc1-supply = <&vdd_ac_bat_reg>;
93 vcc2-supply = <&vdd_ac_bat_reg>;
94 vcc3-supply = <&vio_reg>;
95 vcc4-supply = <&vdd_5v0_reg>;
96 vcc5-supply = <&vdd_ac_bat_reg>;
97 vcc6-supply = <&vdd2_reg>;
98 vcc7-supply = <&vdd_ac_bat_reg>;
99 vccio-supply = <&vdd_ac_bat_reg>;
100
101 regulators {
102 vdd1_reg: vdd1 {
103 regulator-name = "vddio_ddr_1v2";
104 regulator-min-microvolt = <1200000>;
105 regulator-max-microvolt = <1200000>;
106 regulator-always-on;
107 };
108
109 vdd2_reg: vdd2 {
110 regulator-name = "vdd_1v5_gen";
111 regulator-min-microvolt = <1500000>;
112 regulator-max-microvolt = <1500000>;
113 regulator-always-on;
114 };
115
116 vddctrl_reg: vddctrl {
117 regulator-name = "vdd_cpu,vdd_sys";
118 regulator-min-microvolt = <1000000>;
119 regulator-max-microvolt = <1000000>;
120 regulator-always-on;
121 };
122
123 vio_reg: vio {
124 regulator-name = "vdd_1v8_gen";
125 regulator-min-microvolt = <1800000>;
126 regulator-max-microvolt = <1800000>;
127 regulator-always-on;
128 };
129
130 ldo1_reg: ldo1 {
131 regulator-name = "vdd_pexa,vdd_pexb";
132 regulator-min-microvolt = <1050000>;
133 regulator-max-microvolt = <1050000>;
134 };
135
136 ldo2_reg: ldo2 {
137 regulator-name = "vdd_sata,avdd_plle";
138 regulator-min-microvolt = <1050000>;
139 regulator-max-microvolt = <1050000>;
140 };
141
142 /* LDO3 is not connected to anything */
143
144 ldo4_reg: ldo4 {
145 regulator-name = "vdd_rtc";
146 regulator-min-microvolt = <1200000>;
147 regulator-max-microvolt = <1200000>;
148 regulator-always-on;
149 };
150
151 ldo5_reg: ldo5 {
152 regulator-name = "vddio_sdmmc,avdd_vdac";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
155 regulator-always-on;
156 };
157
158 ldo6_reg: ldo6 {
159 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
160 regulator-min-microvolt = <1200000>;
161 regulator-max-microvolt = <1200000>;
162 };
163
164 ldo7_reg: ldo7 {
165 regulator-name = "vdd_pllm,x,u,a_p_c_s";
166 regulator-min-microvolt = <1200000>;
167 regulator-max-microvolt = <1200000>;
168 regulator-always-on;
169 };
170
171 ldo8_reg: ldo8 {
172 regulator-name = "vdd_ddr_hs";
173 regulator-min-microvolt = <1000000>;
174 regulator-max-microvolt = <1000000>;
175 regulator-always-on;
176 };
177 };
178 };
Tom Warren392715b2012-12-21 15:59:15 -0700[diff] [blame]179 };
Allen Martin43b04292013-01-29 13:51:26 +0000[diff] [blame]180
181 spi@7000da00 {
182 status = "okay";
183 spi-max-frequency = <25000000>;
184 };
Tom Warren20515be2013-02-26 11:14:17 -0700[diff] [blame]185
186 sdhci@78000000 {
187 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]188 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
189 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
190 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
Tom Warren20515be2013-02-26 11:14:17 -0700[diff] [blame]191 bus-width = <4>;
192 };
193
194 sdhci@78000600 {
195 status = "okay";
196 bus-width = <8>;
Tom Warren1c77f022016-09-13 10:45:42 -0600[diff] [blame]197 non-removable;
Tom Warren20515be2013-02-26 11:14:17 -0700[diff] [blame]198 };
Jim Lindfed30e2013-06-21 19:05:46 +0800[diff] [blame]199
200 usb@7d008000 {
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]201 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
Jim Lindfed30e2013-06-21 19:05:46 +0800[diff] [blame]202 status = "okay";
203 };
Thierry Reding0a5ffb02014-12-09 22:25:17 -0700[diff] [blame]204
Stephen Warren08d2dba2016-09-13 10:45:51 -0600[diff] [blame]205 clocks {
206 compatible = "simple-bus";
207 #address-cells = <1>;
208 #size-cells = <0>;
209
210 clk32k_in: clock@0 {
211 compatible = "fixed-clock";
212 reg=<0>;
213 #clock-cells = <0>;
214 clock-frequency = <32768>;
215 };
216 };
217
Thierry Reding0a5ffb02014-12-09 22:25:17 -0700[diff] [blame]218 regulators {
219 compatible = "simple-bus";
220 #address-cells = <1>;
221 #size-cells = <0>;
222
223 vdd_ac_bat_reg: regulator@0 {
224 compatible = "regulator-fixed";
225 reg = <0>;
226 regulator-name = "vdd_ac_bat";
227 regulator-min-microvolt = <5000000>;
228 regulator-max-microvolt = <5000000>;
229 regulator-always-on;
230 };
231
232 cam_1v8_reg: regulator@1 {
233 compatible = "regulator-fixed";
234 reg = <1>;
235 regulator-name = "cam_1v8";
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <1800000>;
238 enable-active-high;
239 gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
240 vin-supply = <&vio_reg>;
241 };
242
243 cp_5v_reg: regulator@2 {
244 compatible = "regulator-fixed";
245 reg = <2>;
246 regulator-name = "cp_5v";
247 regulator-min-microvolt = <5000000>;
248 regulator-max-microvolt = <5000000>;
249 regulator-boot-on;
250 regulator-always-on;
251 enable-active-high;
252 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
253 };
254
255 emmc_3v3_reg: regulator@3 {
256 compatible = "regulator-fixed";
257 reg = <3>;
258 regulator-name = "emmc_3v3";
259 regulator-min-microvolt = <3300000>;
260 regulator-max-microvolt = <3300000>;
261 regulator-always-on;
262 regulator-boot-on;
263 enable-active-high;
264 gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
265 vin-supply = <&sys_3v3_reg>;
266 };
267
268 modem_3v3_reg: regulator@4 {
269 compatible = "regulator-fixed";
270 reg = <4>;
271 regulator-name = "modem_3v3";
272 regulator-min-microvolt = <3300000>;
273 regulator-max-microvolt = <3300000>;
274 enable-active-high;
275 gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
276 };
277
278 pex_hvdd_3v3_reg: regulator@5 {
279 compatible = "regulator-fixed";
280 reg = <5>;
281 regulator-name = "pex_hvdd_3v3";
282 regulator-min-microvolt = <3300000>;
283 regulator-max-microvolt = <3300000>;
284 enable-active-high;
285 gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
286 vin-supply = <&sys_3v3_reg>;
287 };
288
289 vdd_cam1_ldo_reg: regulator@6 {
290 compatible = "regulator-fixed";
291 reg = <6>;
292 regulator-name = "vdd_cam1_ldo";
293 regulator-min-microvolt = <2800000>;
294 regulator-max-microvolt = <2800000>;
295 enable-active-high;
296 gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
297 vin-supply = <&sys_3v3_reg>;
298 };
299
300 vdd_cam2_ldo_reg: regulator@7 {
301 compatible = "regulator-fixed";
302 reg = <7>;
303 regulator-name = "vdd_cam2_ldo";
304 regulator-min-microvolt = <2800000>;
305 regulator-max-microvolt = <2800000>;
306 enable-active-high;
307 gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
308 vin-supply = <&sys_3v3_reg>;
309 };
310
311 vdd_cam3_ldo_reg: regulator@8 {
312 compatible = "regulator-fixed";
313 reg = <8>;
314 regulator-name = "vdd_cam3_ldo";
315 regulator-min-microvolt = <3300000>;
316 regulator-max-microvolt = <3300000>;
317 enable-active-high;
318 gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
319 vin-supply = <&sys_3v3_reg>;
320 };
321
322 vdd_com_reg: regulator@9 {
323 compatible = "regulator-fixed";
324 reg = <9>;
325 regulator-name = "vdd_com";
326 regulator-min-microvolt = <3300000>;
327 regulator-max-microvolt = <3300000>;
328 regulator-always-on;
329 regulator-boot-on;
330 enable-active-high;
331 gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
332 vin-supply = <&sys_3v3_reg>;
333 };
334
335 vdd_fuse_3v3_reg: regulator@10 {
336 compatible = "regulator-fixed";
337 reg = <10>;
338 regulator-name = "vdd_fuse_3v3";
339 regulator-min-microvolt = <3300000>;
340 regulator-max-microvolt = <3300000>;
341 enable-active-high;
342 gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
343 vin-supply = <&sys_3v3_reg>;
344 };
345
346 vdd_pnl1_reg: regulator@11 {
347 compatible = "regulator-fixed";
348 reg = <11>;
349 regulator-name = "vdd_pnl1";
350 regulator-min-microvolt = <3300000>;
351 regulator-max-microvolt = <3300000>;
352 regulator-always-on;
353 regulator-boot-on;
354 enable-active-high;
355 gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
356 vin-supply = <&sys_3v3_reg>;
357 };
358
359 vdd_vid_reg: regulator@12 {
360 compatible = "regulator-fixed";
361 reg = <12>;
362 regulator-name = "vddio_vid";
363 regulator-min-microvolt = <5000000>;
364 regulator-max-microvolt = <5000000>;
365 enable-active-high;
366 gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
367 gpio-open-drain;
368 vin-supply = <&vdd_5v0_reg>;
369 };
370
371 ddr_reg: regulator@100 {
372 compatible = "regulator-fixed";
373 regulator-name = "ddr";
374 reg = <100>;
375 regulator-min-microvolt = <1500000>;
376 regulator-max-microvolt = <1500000>;
377 regulator-always-on;
378 regulator-boot-on;
379 enable-active-high;
380 gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
381 };
382
383 sys_3v3_reg: regulator@101 {
384 compatible = "regulator-fixed";
385 reg = <101>;
386 regulator-name = "sys_3v3";
387 regulator-min-microvolt = <3300000>;
388 regulator-max-microvolt = <3300000>;
389 regulator-always-on;
390 regulator-boot-on;
391 enable-active-high;
392 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
393 };
394
395 usb1_vbus_reg: regulator@102 {
396 compatible = "regulator-fixed";
397 reg = <102>;
398 regulator-name = "usb1_vbus";
399 regulator-min-microvolt = <5000000>;
400 regulator-max-microvolt = <5000000>;
401 enable-active-high;
402 gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
403 gpio-open-drain;
404 vin-supply = <&vdd_5v0_reg>;
405 };
406
407 usb3_vbus_reg: regulator@103 {
408 compatible = "regulator-fixed";
409 reg = <103>;
410 regulator-name = "usb3_vbus";
411 regulator-min-microvolt = <5000000>;
412 regulator-max-microvolt = <5000000>;
413 enable-active-high;
414 gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
415 gpio-open-drain;
416 vin-supply = <&vdd_5v0_reg>;
417 };
418
419 vdd_5v0_reg: regulator@104 {
420 compatible = "regulator-fixed";
421 reg = <104>;
422 regulator-name = "5v0";
423 regulator-min-microvolt = <5000000>;
424 regulator-max-microvolt = <5000000>;
425 enable-active-high;
426 gpio = <&pmic 8 GPIO_ACTIVE_HIGH>;
427 };
428
429 vdd_bl_reg: regulator@105 {
430 compatible = "regulator-fixed";
431 reg = <105>;
432 regulator-name = "vdd_bl";
433 regulator-min-microvolt = <5000000>;
434 regulator-max-microvolt = <5000000>;
435 regulator-always-on;
436 regulator-boot-on;
437 enable-active-high;
438 gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
439 };
440
441 vdd_bl2_reg: regulator@106 {
442 compatible = "regulator-fixed";
443 reg = <106>;
444 regulator-name = "vdd_bl2";
445 regulator-min-microvolt = <5000000>;
446 regulator-max-microvolt = <5000000>;
447 regulator-always-on;
448 regulator-boot-on;
449 enable-active-high;
450 gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
451 };
452 };
Tom Warrenaa35e1e2012-12-11 13:34:16 +0000[diff] [blame]453};
Simon Glass2a00cc92017-06-12 06:22:01 -0600[diff] [blame]454
455&uarta {
456 status = "okay";
457};