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Peter Baradae5b77e62011-12-19 19:54:51 +00001/*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards.
7 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Peter Baradae5b77e62011-12-19 19:54:51 +00009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 */
17#define CONFIG_OMAP /* in a TI OMAP core */
Peter Baradae5b77e62011-12-19 19:54:51 +000018#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
Marek Vasutaede1882012-07-21 05:02:23 +000019#define CONFIG_OMAP_GPIO
Lokesh Vutla56055052013-07-30 11:36:30 +053020#define CONFIG_OMAP_COMMON
Nishanth Menon3e46e3e2015-03-09 17:12:08 -050021/* Common ARM Erratas */
22#define CONFIG_ARM_ERRATA_454179
23#define CONFIG_ARM_ERRATA_430973
24#define CONFIG_ARM_ERRATA_621766
Peter Baradae5b77e62011-12-19 19:54:51 +000025
Peter Baradae5b77e62011-12-19 19:54:51 +000026#define CONFIG_SYS_TEXT_BASE 0x80400000
27
28#define CONFIG_SDRC /* The chip has SDRC controller */
29
30#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050031#include <asm/arch/omap.h>
Peter Baradae5b77e62011-12-19 19:54:51 +000032
33/*
34 * Display CPU and Board information
35 */
36#define CONFIG_DISPLAY_CPUINFO
37#define CONFIG_DISPLAY_BOARDINFO
38
39/* Clock Defines */
40#define V_OSCK 26000000 /* Clock output from T2 */
41#define V_SCLK (V_OSCK >> 1)
42
43#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
44
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
48#define CONFIG_REVISION_TAG
49
50#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
51#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
52
53/*
54 * Size of malloc() pool
55 */
56#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
57 /* Sector */
58#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
59
60/*
61 * Hardware drivers
62 */
63
64/*
65 * NS16550 Configuration
66 */
67#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
68
69#define CONFIG_SYS_NS16550
70#define CONFIG_SYS_NS16550_SERIAL
71#define CONFIG_SYS_NS16550_REG_SIZE (-4)
72#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
73
74/*
75 * select serial console configuration
76 */
77#define CONFIG_CONS_INDEX 1
78#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
79#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
80
81/* allow to overwrite serial and ethaddr */
82#define CONFIG_ENV_OVERWRITE
83#define CONFIG_BAUDRATE 115200
84#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
85 115200}
86#define CONFIG_GENERIC_MMC
87#define CONFIG_MMC
88#define CONFIG_OMAP_HSMMC
89#define CONFIG_DOS_PARTITION
90
91/* commands to include */
92#include <config_cmd_default.h>
93
94#define CONFIG_CMD_CACHE
95#define CONFIG_CMD_EXT2 /* EXT2 Support */
96#define CONFIG_CMD_FAT /* FAT support */
97#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
98#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
99#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
100#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
101#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
102 "1920k(u-boot),128k(u-boot-env),"\
103 "4m(kernel),-(fs)"
104
105#define CONFIG_CMD_I2C /* I2C serial bus support */
106#define CONFIG_CMD_MMC /* MMC support */
107#define CONFIG_CMD_NAND /* NAND support */
108#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
109#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
110#define CONFIG_CMD_PING
111#define CONFIG_CMD_DHCP
Marek Vasutb45e29d2012-03-31 07:47:18 +0000112#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
Peter Baradae5b77e62011-12-19 19:54:51 +0000113
114#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
115#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
116#undef CONFIG_CMD_IMI /* iminfo */
117#undef CONFIG_CMD_IMLS /* List all found images */
118
119#define CONFIG_SYS_NO_FLASH
120
121/*
122 * I2C
123 */
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200124#define CONFIG_SYS_I2C
125#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
126#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
127#define CONFIG_SYS_I2C_OMAP34XX
Peter Baradae5b77e62011-12-19 19:54:51 +0000128
129/*
130 * TWL4030
131 */
132#define CONFIG_TWL4030_POWER
133
134/*
135 * Board NAND Info.
136 */
137#define CONFIG_SYS_NAND_QUIET_TEST
138#define CONFIG_NAND_OMAP_GPMC
139#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
140 /* to access nand */
141#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
142 /* to access nand at */
143 /* CS0 */
144
145#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
146 /* NAND devices */
pekon gupta6250faf2014-05-06 00:46:19 +0530147#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
Peter Baradae5b77e62011-12-19 19:54:51 +0000148#define CONFIG_JFFS2_NAND
149/* nand device jffs2 lives on */
150#define CONFIG_JFFS2_DEV "nand0"
151/* start of jffs2 partition */
152#define CONFIG_JFFS2_PART_OFFSET 0x680000
153#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
154 /* partition */
155
156/* Environment information */
157#define CONFIG_BOOTDELAY 2
158
159/*
160 * PREBOOT assumes the 4.3" display is attached. User can interrupt
161 * and modify display variable to suit their needs.
162 */
163#define CONFIG_PREBOOT \
164 "echo ======================NOTICE============================;"\
165 "echo \"The u-boot environment is not set.\";" \
166 "echo \"If using a display a valid display varible for your panel\";" \
167 "echo \"needs to be set.\";" \
168 "echo \"Valid display options are:\";" \
169 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
170 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
171 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
172 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
173 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
174 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
175 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
176 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
177 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
178 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
179 "setenv display 15;" \
180 "setenv preboot;" \
181 "saveenv;"
182
183
184#define CONFIG_EXTRA_ENV_SETTINGS \
185 "loadaddr=0x81000000\0" \
186 "bootfile=uImage\0" \
187 "mtdids=" MTDIDS_DEFAULT "\0" \
188 "mtdparts=" MTDPARTS_DEFAULT "\0" \
189 "mmcdev=0\0" \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000190 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
Peter Baradae5b77e62011-12-19 19:54:51 +0000191 "if run loadbootscript; then " \
192 "run bootscript; " \
193 "else " \
194 "run defaultboot;" \
195 "fi; " \
196 "else run defaultboot; fi\0" \
197 "defaultboot=run mmcramboot\0" \
198 "consoledevice=ttyO0\0" \
199 "display=15\0" \
200 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
201 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
202 "rotation=0\0" \
203 "vrfb_arg=if itest ${rotation} -ne 0; then " \
204 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
205 "omapfb.rotate=${rotation}; " \
206 "fi\0" \
207 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
208 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
209 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
210 "${otherbootargs};" \
211 "run addmtdparts; " \
212 "run vrfb_arg\0" \
213 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
214 "bootscript=echo 'Running bootscript from mmc ...'; " \
215 "source ${loadaddr}\0" \
216 "loaduimage=mmc rescan ${mmcdev}; " \
217 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
218 "ramdisksize=64000\0" \
219 "ramdiskaddr=0x82000000\0" \
220 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
221 "ramargs=run setconsole; setenv bootargs console=${console} " \
222 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
223 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
224 "run ramargs; " \
225 "run common_bootargs; " \
226 "run dump_bootargs; " \
227 "run loaduimage; " \
228 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
229 "bootm ${loadaddr} ${ramdiskaddr}\0" \
230 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
231 "run ramargs; " \
232 "run common_bootargs; " \
233 "run dump_bootargs; " \
234 "tftpboot ${loadaddr} ${bootfile}; "\
235 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
236 "bootm ${loadaddr} ${ramdiskaddr}\0"
237
238#define CONFIG_BOOTCOMMAND \
239 "run autoboot"
240
241#define CONFIG_AUTO_COMPLETE
242/*
243 * Miscellaneous configurable options
244 */
245#define CONFIG_SYS_LONGHELP /* undef to save memory */
246#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Peter Baradae5b77e62011-12-19 19:54:51 +0000247#define CONFIG_SYS_PROMPT "OMAP Logic # "
248#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
249/* Print Buffer Size */
250#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
251 sizeof(CONFIG_SYS_PROMPT) + 16)
252#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
253/* Boot Argument Buffer Size */
254#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
255/* memtest works on */
256#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
257#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
258 0x01F00000) /* 31MB */
259
260#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
261 /* address */
262
263/*
264 * OMAP3 has 12 GP timers, they can be driven by the system clock
265 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
266 * This rate is divided by a local divisor.
267 */
268#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
269#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Peter Baradae5b77e62011-12-19 19:54:51 +0000270
271/*
Peter Baradae5b77e62011-12-19 19:54:51 +0000272 * Physical Memory Map
273 */
274#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
275#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
276#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
277
278/*
279 * FLASH and environment organization
280 */
281
282/* **** PISMO SUPPORT *** */
Peter Baradae5b77e62011-12-19 19:54:51 +0000283#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
284
285#if defined(CONFIG_CMD_NAND)
pekon gupta0a9ec452014-07-18 17:59:41 +0530286#define CONFIG_SYS_FLASH_BASE NAND_BASE
Peter Baradae5b77e62011-12-19 19:54:51 +0000287#elif defined(CONFIG_CMD_ONENAND)
pekon gupta0a9ec452014-07-18 17:59:41 +0530288#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
Peter Baradae5b77e62011-12-19 19:54:51 +0000289#endif
290
291/* Monitor at start of flash */
292#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
293
294#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
295
296#if defined(CONFIG_CMD_NAND)
297#define CONFIG_NAND_OMAP_GPMC
Peter Baradae5b77e62011-12-19 19:54:51 +0000298#define CONFIG_ENV_IS_IN_NAND
299#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
300#endif
301
302#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
303#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
304
305#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
306#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
307#define CONFIG_SYS_INIT_RAM_SIZE 0x800
308#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
309 CONFIG_SYS_INIT_RAM_SIZE - \
310 GENERATED_GBL_DATA_SIZE)
311
312/*
313 * SMSC922x Ethernet
314 */
315#if defined(CONFIG_CMD_NET)
316
317#define CONFIG_SMC911X
318#define CONFIG_SMC911X_16_BIT
319#define CONFIG_SMC911X_BASE 0x08000000
320
321#endif /* (CONFIG_CMD_NET) */
322
323/*
324 * BOOTP fields
325 */
326
327#define CONFIG_BOOTP_SUBNETMASK 0x00000001
328#define CONFIG_BOOTP_GATEWAY 0x00000002
329#define CONFIG_BOOTP_HOSTNAME 0x00000004
330#define CONFIG_BOOTP_BOOTPATH 0x00000010
331
332#endif /* __CONFIG_H */