Peter Barada | e5b77e6 | 2011-12-19 19:54:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2011 Logic Product Development <www.logicpd.com> |
| 3 | * Peter Barada <peter.barada@logicpd.com> |
| 4 | * |
| 5 | * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo |
| 6 | * reference boards. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
| 30 | /* |
| 31 | * High Level Configuration Options |
| 32 | */ |
| 33 | #define CONFIG_OMAP /* in a TI OMAP core */ |
| 34 | #define CONFIG_OMAP34XX /* which is a 34XX */ |
| 35 | #define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */ |
Marek Vasut | aede188 | 2012-07-21 05:02:23 +0000 | [diff] [blame^] | 36 | #define CONFIG_OMAP_GPIO |
Peter Barada | e5b77e6 | 2011-12-19 19:54:51 +0000 | [diff] [blame] | 37 | |
| 38 | #undef CONFIG_USE_IRQ /* no support for IRQs */ |
| 39 | |
| 40 | #define CONFIG_SYS_TEXT_BASE 0x80400000 |
| 41 | |
| 42 | #define CONFIG_SDRC /* The chip has SDRC controller */ |
| 43 | |
| 44 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 45 | #include <asm/arch/omap3.h> |
| 46 | |
| 47 | /* |
| 48 | * Display CPU and Board information |
| 49 | */ |
| 50 | #define CONFIG_DISPLAY_CPUINFO |
| 51 | #define CONFIG_DISPLAY_BOARDINFO |
| 52 | |
| 53 | /* Clock Defines */ |
| 54 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 55 | #define V_SCLK (V_OSCK >> 1) |
| 56 | |
| 57 | #define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ |
| 58 | |
| 59 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 60 | #define CONFIG_SETUP_MEMORY_TAGS |
| 61 | #define CONFIG_INITRD_TAG |
| 62 | #define CONFIG_REVISION_TAG |
| 63 | |
| 64 | #define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ |
| 65 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */ |
| 66 | |
| 67 | /* |
| 68 | * Size of malloc() pool |
| 69 | */ |
| 70 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
| 71 | /* Sector */ |
| 72 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
| 73 | |
| 74 | /* |
| 75 | * Hardware drivers |
| 76 | */ |
| 77 | |
| 78 | /* |
| 79 | * NS16550 Configuration |
| 80 | */ |
| 81 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 82 | |
| 83 | #define CONFIG_SYS_NS16550 |
| 84 | #define CONFIG_SYS_NS16550_SERIAL |
| 85 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 86 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 87 | |
| 88 | /* |
| 89 | * select serial console configuration |
| 90 | */ |
| 91 | #define CONFIG_CONS_INDEX 1 |
| 92 | #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 |
| 93 | #define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */ |
| 94 | |
| 95 | /* allow to overwrite serial and ethaddr */ |
| 96 | #define CONFIG_ENV_OVERWRITE |
| 97 | #define CONFIG_BAUDRATE 115200 |
| 98 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 99 | 115200} |
| 100 | #define CONFIG_GENERIC_MMC |
| 101 | #define CONFIG_MMC |
| 102 | #define CONFIG_OMAP_HSMMC |
| 103 | #define CONFIG_DOS_PARTITION |
| 104 | |
| 105 | /* commands to include */ |
| 106 | #include <config_cmd_default.h> |
| 107 | |
| 108 | #define CONFIG_CMD_CACHE |
| 109 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
| 110 | #define CONFIG_CMD_FAT /* FAT support */ |
| 111 | #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ |
| 112 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
| 113 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 114 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" |
| 115 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\ |
| 116 | "1920k(u-boot),128k(u-boot-env),"\ |
| 117 | "4m(kernel),-(fs)" |
| 118 | |
| 119 | #define CONFIG_CMD_I2C /* I2C serial bus support */ |
| 120 | #define CONFIG_CMD_MMC /* MMC support */ |
| 121 | #define CONFIG_CMD_NAND /* NAND support */ |
| 122 | #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ |
| 123 | #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ |
| 124 | #define CONFIG_CMD_PING |
| 125 | #define CONFIG_CMD_DHCP |
Marek Vasut | b45e29d | 2012-03-31 07:47:18 +0000 | [diff] [blame] | 126 | #define CONFIG_CMD_SETEXPR /* Evaluate expressions */ |
Peter Barada | e5b77e6 | 2011-12-19 19:54:51 +0000 | [diff] [blame] | 127 | |
| 128 | #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
| 129 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
| 130 | #undef CONFIG_CMD_IMI /* iminfo */ |
| 131 | #undef CONFIG_CMD_IMLS /* List all found images */ |
| 132 | |
| 133 | #define CONFIG_SYS_NO_FLASH |
| 134 | |
| 135 | /* |
| 136 | * I2C |
| 137 | */ |
| 138 | #define CONFIG_HARD_I2C |
| 139 | #define CONFIG_DRIVER_OMAP34XX_I2C |
| 140 | |
| 141 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 142 | #define CONFIG_SYS_I2C_SLAVE 1 |
| 143 | #define CONFIG_SYS_I2C_BUS 0 |
| 144 | #define CONFIG_SYS_I2C_BUS_SELECT 1 |
| 145 | #define CONFIG_I2C_MULTI_BUS |
| 146 | |
| 147 | /* |
| 148 | * TWL4030 |
| 149 | */ |
| 150 | #define CONFIG_TWL4030_POWER |
| 151 | |
| 152 | /* |
| 153 | * Board NAND Info. |
| 154 | */ |
| 155 | #define CONFIG_SYS_NAND_QUIET_TEST |
| 156 | #define CONFIG_NAND_OMAP_GPMC |
| 157 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
| 158 | /* to access nand */ |
| 159 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 160 | /* to access nand at */ |
| 161 | /* CS0 */ |
| 162 | |
| 163 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ |
| 164 | /* NAND devices */ |
| 165 | #define CONFIG_JFFS2_NAND |
| 166 | /* nand device jffs2 lives on */ |
| 167 | #define CONFIG_JFFS2_DEV "nand0" |
| 168 | /* start of jffs2 partition */ |
| 169 | #define CONFIG_JFFS2_PART_OFFSET 0x680000 |
| 170 | #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ |
| 171 | /* partition */ |
| 172 | |
| 173 | /* Environment information */ |
| 174 | #define CONFIG_BOOTDELAY 2 |
| 175 | |
| 176 | /* |
| 177 | * PREBOOT assumes the 4.3" display is attached. User can interrupt |
| 178 | * and modify display variable to suit their needs. |
| 179 | */ |
| 180 | #define CONFIG_PREBOOT \ |
| 181 | "echo ======================NOTICE============================;"\ |
| 182 | "echo \"The u-boot environment is not set.\";" \ |
| 183 | "echo \"If using a display a valid display varible for your panel\";" \ |
| 184 | "echo \"needs to be set.\";" \ |
| 185 | "echo \"Valid display options are:\";" \ |
| 186 | "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \ |
| 187 | "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \ |
| 188 | "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \ |
| 189 | "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \ |
| 190 | "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \ |
| 191 | "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \ |
| 192 | "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \ |
| 193 | "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \ |
| 194 | "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \ |
| 195 | "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \ |
| 196 | "setenv display 15;" \ |
| 197 | "setenv preboot;" \ |
| 198 | "saveenv;" |
| 199 | |
| 200 | |
| 201 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 202 | "loadaddr=0x81000000\0" \ |
| 203 | "bootfile=uImage\0" \ |
| 204 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
| 205 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
| 206 | "mmcdev=0\0" \ |
| 207 | "autoboot=if mmc rescan ${mmcdev}; then " \ |
| 208 | "if run loadbootscript; then " \ |
| 209 | "run bootscript; " \ |
| 210 | "else " \ |
| 211 | "run defaultboot;" \ |
| 212 | "fi; " \ |
| 213 | "else run defaultboot; fi\0" \ |
| 214 | "defaultboot=run mmcramboot\0" \ |
| 215 | "consoledevice=ttyO0\0" \ |
| 216 | "display=15\0" \ |
| 217 | "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \ |
| 218 | "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \ |
| 219 | "rotation=0\0" \ |
| 220 | "vrfb_arg=if itest ${rotation} -ne 0; then " \ |
| 221 | "setenv bootargs ${bootargs} omapfb.vrfb=y " \ |
| 222 | "omapfb.rotate=${rotation}; " \ |
| 223 | "fi\0" \ |
| 224 | "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \ |
| 225 | "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
| 226 | "common_bootargs=setenv bootargs ${bootargs} display=${display} " \ |
| 227 | "${otherbootargs};" \ |
| 228 | "run addmtdparts; " \ |
| 229 | "run vrfb_arg\0" \ |
| 230 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 231 | "bootscript=echo 'Running bootscript from mmc ...'; " \ |
| 232 | "source ${loadaddr}\0" \ |
| 233 | "loaduimage=mmc rescan ${mmcdev}; " \ |
| 234 | "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ |
| 235 | "ramdisksize=64000\0" \ |
| 236 | "ramdiskaddr=0x82000000\0" \ |
| 237 | "ramdiskimage=rootfs.ext2.gz.uboot\0" \ |
| 238 | "ramargs=run setconsole; setenv bootargs console=${console} " \ |
| 239 | "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ |
| 240 | "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \ |
| 241 | "run ramargs; " \ |
| 242 | "run common_bootargs; " \ |
| 243 | "run dump_bootargs; " \ |
| 244 | "run loaduimage; " \ |
| 245 | "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\ |
| 246 | "bootm ${loadaddr} ${ramdiskaddr}\0" \ |
| 247 | "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \ |
| 248 | "run ramargs; " \ |
| 249 | "run common_bootargs; " \ |
| 250 | "run dump_bootargs; " \ |
| 251 | "tftpboot ${loadaddr} ${bootfile}; "\ |
| 252 | "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\ |
| 253 | "bootm ${loadaddr} ${ramdiskaddr}\0" |
| 254 | |
| 255 | #define CONFIG_BOOTCOMMAND \ |
| 256 | "run autoboot" |
| 257 | |
| 258 | #define CONFIG_AUTO_COMPLETE |
| 259 | /* |
| 260 | * Miscellaneous configurable options |
| 261 | */ |
| 262 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 263 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
Peter Barada | e5b77e6 | 2011-12-19 19:54:51 +0000 | [diff] [blame] | 264 | #define CONFIG_SYS_PROMPT "OMAP Logic # " |
| 265 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| 266 | /* Print Buffer Size */ |
| 267 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 268 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 269 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 270 | /* Boot Argument Buffer Size */ |
| 271 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 272 | /* memtest works on */ |
| 273 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) |
| 274 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
| 275 | 0x01F00000) /* 31MB */ |
| 276 | |
| 277 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ |
| 278 | /* address */ |
| 279 | |
| 280 | /* |
| 281 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 282 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 283 | * This rate is divided by a local divisor. |
| 284 | */ |
| 285 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 286 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
| 287 | #define CONFIG_SYS_HZ 1000 |
| 288 | |
| 289 | /* |
| 290 | * Stack sizes |
| 291 | * |
| 292 | * The stack sizes are set up in start.S using the settings below |
| 293 | */ |
| 294 | #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ |
| 295 | |
| 296 | /* |
| 297 | * Physical Memory Map |
| 298 | */ |
| 299 | #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
| 300 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 301 | #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
| 302 | |
| 303 | /* |
| 304 | * FLASH and environment organization |
| 305 | */ |
| 306 | |
| 307 | /* **** PISMO SUPPORT *** */ |
| 308 | |
| 309 | /* Configure the PISMO */ |
| 310 | #define PISMO1_NAND_SIZE GPMC_SIZE_128M |
| 311 | |
| 312 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
| 313 | |
| 314 | #if defined(CONFIG_CMD_NAND) |
| 315 | #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE |
| 316 | #elif defined(CONFIG_CMD_ONENAND) |
| 317 | #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE |
| 318 | #endif |
| 319 | |
| 320 | /* Monitor at start of flash */ |
| 321 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
| 322 | |
| 323 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
| 324 | |
| 325 | #if defined(CONFIG_CMD_NAND) |
| 326 | #define CONFIG_NAND_OMAP_GPMC |
| 327 | #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 |
| 328 | #define CONFIG_ENV_IS_IN_NAND |
| 329 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
| 330 | #endif |
| 331 | |
| 332 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
| 333 | #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET |
| 334 | |
| 335 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 336 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 337 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 338 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 339 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 340 | GENERATED_GBL_DATA_SIZE) |
| 341 | |
| 342 | /* |
| 343 | * SMSC922x Ethernet |
| 344 | */ |
| 345 | #if defined(CONFIG_CMD_NET) |
| 346 | |
| 347 | #define CONFIG_SMC911X |
| 348 | #define CONFIG_SMC911X_16_BIT |
| 349 | #define CONFIG_SMC911X_BASE 0x08000000 |
| 350 | |
| 351 | #endif /* (CONFIG_CMD_NET) */ |
| 352 | |
| 353 | /* |
| 354 | * BOOTP fields |
| 355 | */ |
| 356 | |
| 357 | #define CONFIG_BOOTP_SUBNETMASK 0x00000001 |
| 358 | #define CONFIG_BOOTP_GATEWAY 0x00000002 |
| 359 | #define CONFIG_BOOTP_HOSTNAME 0x00000004 |
| 360 | #define CONFIG_BOOTP_BOOTPATH 0x00000010 |
| 361 | |
| 362 | #endif /* __CONFIG_H */ |