Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> |
| 4 | * |
| 5 | */ |
| 6 | |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame^] | 7 | #include <hang.h> |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 8 | #include <asm/io.h> |
| 9 | #include <asm/u-boot.h> |
| 10 | #include <asm/utils.h> |
| 11 | #include <common.h> |
Ley Foon Tan | 2667ddd | 2018-07-12 21:44:24 +0800 | [diff] [blame] | 12 | #include <debug_uart.h> |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 13 | #include <image.h> |
| 14 | #include <spl.h> |
| 15 | #include <asm/arch/clock_manager.h> |
Ley Foon Tan | f1c4bd5 | 2019-11-27 15:55:15 +0800 | [diff] [blame] | 16 | #include <asm/arch/firewall.h> |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 17 | #include <asm/arch/mailbox_s10.h> |
Ley Foon Tan | fed4c95 | 2019-11-08 10:38:19 +0800 | [diff] [blame] | 18 | #include <asm/arch/misc.h> |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 19 | #include <asm/arch/reset_manager.h> |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 20 | #include <asm/arch/system_manager.h> |
| 21 | #include <watchdog.h> |
Ley Foon Tan | 3fdf436 | 2019-05-06 09:56:01 +0800 | [diff] [blame] | 22 | #include <dm/uclass.h> |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 23 | |
| 24 | DECLARE_GLOBAL_DATA_PTR; |
| 25 | |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 26 | u32 spl_boot_device(void) |
| 27 | { |
| 28 | /* TODO: Get from SDM or handoff */ |
| 29 | return BOOT_DEVICE_MMC1; |
| 30 | } |
| 31 | |
| 32 | #ifdef CONFIG_SPL_MMC_SUPPORT |
| 33 | u32 spl_boot_mode(const u32 boot_device) |
| 34 | { |
Tien Fong Chee | 6091dd1 | 2019-01-23 14:20:05 +0800 | [diff] [blame] | 35 | #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 36 | return MMCSD_MODE_FS; |
| 37 | #else |
| 38 | return MMCSD_MODE_RAW; |
| 39 | #endif |
| 40 | } |
| 41 | #endif |
| 42 | |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 43 | void board_init_f(ulong dummy) |
| 44 | { |
| 45 | const struct cm_config *cm_default_cfg = cm_get_default_config(); |
| 46 | int ret; |
| 47 | |
Ley Foon Tan | fed4c95 | 2019-11-08 10:38:19 +0800 | [diff] [blame] | 48 | ret = spl_early_init(); |
| 49 | if (ret) |
| 50 | hang(); |
| 51 | |
| 52 | socfpga_get_managers_addr(); |
| 53 | |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 54 | #ifdef CONFIG_HW_WATCHDOG |
| 55 | /* Ensure watchdog is paused when debugging is happening */ |
Ley Foon Tan | 3d3a860 | 2019-11-08 10:38:20 +0800 | [diff] [blame] | 56 | writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, |
Ley Foon Tan | 0b1680e | 2019-11-27 15:55:18 +0800 | [diff] [blame] | 57 | socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 58 | |
| 59 | /* Enable watchdog before initializing the HW */ |
| 60 | socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); |
| 61 | socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0); |
| 62 | hw_watchdog_init(); |
| 63 | #endif |
| 64 | |
| 65 | /* ensure all processors are not released prior Linux boot */ |
| 66 | writeq(0, CPU_RELEASE_ADDR); |
| 67 | |
| 68 | socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0); |
| 69 | timer_init(); |
| 70 | |
Ley Foon Tan | 0968d4e | 2018-08-17 16:22:02 +0800 | [diff] [blame] | 71 | sysmgr_pinmux_init(); |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 72 | |
| 73 | /* configuring the HPS clocks */ |
| 74 | cm_basic_init(cm_default_cfg); |
| 75 | |
| 76 | #ifdef CONFIG_DEBUG_UART |
| 77 | socfpga_per_reset(SOCFPGA_RESET(UART0), 0); |
| 78 | debug_uart_init(); |
| 79 | #endif |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 80 | |
| 81 | preloader_console_init(); |
| 82 | cm_print_clock_quick_summary(); |
| 83 | |
Ley Foon Tan | f1c4bd5 | 2019-11-27 15:55:15 +0800 | [diff] [blame] | 84 | firewall_setup(); |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 85 | |
| 86 | /* disable ocram security at CCU for non secure access */ |
| 87 | clrbits_le32(CCU_REG_ADDR(CCU_CPU0_MPRT_ADMASK_MEM_RAM0), |
| 88 | CCU_ADMASK_P_MASK | CCU_ADMASK_NS_MASK); |
| 89 | clrbits_le32(CCU_REG_ADDR(CCU_IOM_MPRT_ADMASK_MEM_RAM0), |
| 90 | CCU_ADMASK_P_MASK | CCU_ADMASK_NS_MASK); |
| 91 | |
Ley Foon Tan | 3fdf436 | 2019-05-06 09:56:01 +0800 | [diff] [blame] | 92 | #if CONFIG_IS_ENABLED(ALTERA_SDRAM) |
| 93 | struct udevice *dev; |
| 94 | |
| 95 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 96 | if (ret) { |
| 97 | debug("DRAM init failed: %d\n", ret); |
| 98 | hang(); |
| 99 | } |
| 100 | #endif |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 101 | |
Ley Foon Tan | 975e496 | 2018-05-24 00:17:28 +0800 | [diff] [blame] | 102 | mbox_init(); |
| 103 | |
| 104 | #ifdef CONFIG_CADENCE_QSPI |
| 105 | mbox_qspi_open(); |
| 106 | #endif |
| 107 | } |