developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2020 MediaTek Inc. |
| 4 | * |
| 5 | * Author: Weijie Gao <weijie.gao@mediatek.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_MT7628_H |
| 9 | #define __CONFIG_MT7628_H |
| 10 | |
developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 11 | #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 |
| 12 | |
developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 13 | #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 |
| 14 | |
| 15 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 16 | |
| 17 | #define CONFIG_SYS_INIT_SP_OFFSET 0x80000 |
| 18 | |
| 19 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
| 20 | |
| 21 | #define CONFIG_SYS_MAXARGS 16 |
| 22 | #define CONFIG_SYS_CBSIZE 1024 |
| 23 | |
| 24 | /* Serial SPL */ |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 25 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) |
developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 26 | #define CONFIG_SYS_NS16550_MEM32 |
| 27 | #define CONFIG_SYS_NS16550_CLK 40000000 |
| 28 | #define CONFIG_SYS_NS16550_REG_SIZE -4 |
| 29 | #define CONFIG_SYS_NS16550_COM1 0xb0000c00 |
developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 30 | #endif |
| 31 | |
| 32 | /* Serial common */ |
| 33 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ |
| 34 | 230400, 460800, 921600 } |
| 35 | |
| 36 | /* SPL */ |
developer | 7305b4c | 2020-04-21 09:28:49 +0200 | [diff] [blame] | 37 | |
| 38 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE |
| 39 | #define CONFIG_SPL_BSS_START_ADDR 0x80010000 |
| 40 | #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 |
| 41 | #define CONFIG_SPL_MAX_SIZE 0x10000 |
| 42 | #define CONFIG_SPL_PAD_TO 0 |
| 43 | |
| 44 | /* Dummy value */ |
| 45 | #define CONFIG_SYS_UBOOT_BASE 0 |
| 46 | |
| 47 | #endif /* __CONFIG_MT7628_H */ |