| Minkyu Kang | ae6f0c6 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 1 | /* |
| Steve Sakoman | 1ad2158 | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 2 | * Board specific setup info |
| 3 | * |
| 4 | * (C) Copyright 2010 |
| 5 | * Texas Instruments, <www.ti.com> |
| 6 | * |
| 7 | * Author : |
| 8 | * Aneesh V <aneesh@ti.com> |
| Minkyu Kang | ae6f0c6 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| Steve Sakoman | 1ad2158 | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 29 | #include <asm/arch/omap4.h> |
| Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 30 | #ifdef CONFIG_SPL_BUILD |
| 31 | .global save_boot_params |
| 32 | save_boot_params: |
| 33 | /* |
| 34 | * See if the rom code passed pointer is valid: |
| 35 | * It is not valid if it is not in non-secure SRAM |
| 36 | * This may happen if you are booting with the help of |
| 37 | * debugger |
| 38 | */ |
| 39 | ldr r2, =NON_SECURE_SRAM_START |
| 40 | cmp r2, r0 |
| 41 | bgt 1f |
| 42 | ldr r2, =NON_SECURE_SRAM_END |
| 43 | cmp r2, r0 |
| 44 | blt 1f |
| 45 | |
| 46 | /* Store the boot device in omap4_boot_device */ |
| 47 | ldr r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device |
| 48 | and r2, #BOOT_DEVICE_MASK |
| 49 | ldr r3, =omap4_boot_device |
| 50 | str r2, [r3] @ omap4_boot_device <- r1 |
| 51 | |
| 52 | /* Store the boot mode (raw/FAT) in omap4_boot_mode */ |
| 53 | ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr |
| 54 | ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr |
| 55 | ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode |
| 56 | ldr r3, =omap4_boot_mode |
| 57 | str r2, [r3] |
| 58 | 1: |
| 59 | bx lr |
| 60 | #endif |
| Steve Sakoman | 1ad2158 | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 61 | |
| 62 | .globl lowlevel_init |
| 63 | lowlevel_init: |
| 64 | /* |
| 65 | * Setup a temporary stack |
| 66 | */ |
| 67 | ldr sp, =LOW_LEVEL_SRAM_STACK |
| 68 | |
| 69 | /* |
| 70 | * Save the old lr(passed in ip) and the current lr to stack |
| 71 | */ |
| 72 | push {ip, lr} |
| 73 | |
| 74 | /* |
| 75 | * go setup pll, mux, memory |
| 76 | */ |
| 77 | bl s_init |
| 78 | pop {ip, pc} |
| Aneesh V | e3405bd | 2011-06-16 23:30:52 +0000 | [diff] [blame] | 79 | |
| 80 | .globl set_pl310_ctrl_reg |
| 81 | set_pl310_ctrl_reg: |
| 82 | PUSH {r4-r11, lr} @ save registers - ROM code may pollute |
| 83 | @ our registers |
| 84 | LDR r12, =0x102 @ Set PL310 control register - value in R0 |
| 85 | .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5 |
| 86 | @ call ROM Code API to set control register |
| 87 | POP {r4-r11, pc} |