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git01.mediatek.com / filogic / uboot / ee91e48fe8ab553a33007110e1cfc512a1c6b1e8 / . / doc / board / ti / j721e_evm.rst
blob: 637b42d7c6de0a57339157d300335f48b3dec94a [file] [log] [blame]
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]1.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
3
Bryan Brattlof10d3f172022-12-19 14:29:49 -0600[diff] [blame]4J721E Platforms
5===============
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]6
7Introduction:
8-------------
9The J721e family of SoCs are part of K3 Multicore SoC architecture platform
10targeting automotive applications. They are designed as a low power, high
11performance and highly integrated device architecture, adding significant
12enhancement on processing power, graphics capability, video and imaging
13processing, virtualization and coherent memory support.
14
15The device is partitioned into three functional domains, each containing
16specific processing cores and peripherals:
17
181. Wake-up (WKUP) domain:
19 * Device Management and Security Controller (DMSC)
20
212. Microcontroller (MCU) domain:
22 * Dual Core ARM Cortex-R5F processor
23
243. MAIN domain:
25 * Dual core 64-bit ARM Cortex-A72
26 * 2 x Dual cortex ARM Cortex-R5 subsystem
27 * 2 x C66x Digital signal processor sub system
28 * C71x Digital signal processor sub-system with MMA.
29
30More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
31
32Boot Flow:
33----------
34Boot flow is similar to that of AM65x SoC and extending it with remoteproc
35support. Below is the pictorial representation of boot flow:
36
37.. code-block:: text
38
39 +------------------------------------------------------------------------+-----------------------+
40 | DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
41 +------------------------------------------------------------------------+-----------------------+
42 | +--------+ | | | |
43 | | Reset | | | | |
44 | +--------+ | | | |
45 | : | | | |
46 | +--------+ | +-----------+ | | |
47 | | *ROM* |----------|-->| Reset rls | | | |
48 | +--------+ | +-----------+ | | |
49 | | | | : | | |
50 | | ROM | | : | | |
51 | |services| | : | | |
52 | | | | +-------------+ | | |
53 | | | | | *R5 ROM* | | | |
54 | | | | +-------------+ | | |
55 | | |<---------|---|Load and auth| | | |
56 | | | | | tiboot3.bin | | | |
57 | | | | +-------------+ | | |
58 | | | | : | | |
59 | | | | : | | |
60 | | | | : | | |
61 | | | | +-------------+ | | |
62 | | | | | *R5 SPL* | | | |
63 | | | | +-------------+ | | |
64 | | | | | Load | | | |
65 | | | | | sysfw.itb | | | |
66 | | Start | | +-------------+ | | |
67 | | System |<---------|---| Start | | | |
68 | |Firmware| | | SYSFW | | | |
69 | +--------+ | +-------------+ | | |
70 | : | | | | | |
71 | +---------+ | | Load | | | |
72 | | *SYSFW* | | | system | | | |
73 | +---------+ | | Config data | | | |
74 | | |<--------|---| | | | |
75 | | | | +-------------+ | | |
76 | | | | | DDR | | | |
77 | | | | | config | | | |
78 | | | | +-------------+ | | |
79 | | | | | Load | | | |
80 | | | | | tispl.bin | | | |
81 | | | | +-------------+ | | |
82 | | | | | Load R5 | | | |
83 | | | | | firmware | | | |
84 | | | | +-------------+ | | |
85 | | |<--------|---| Start A72 | | | |
86 | | | | | and jump to | | | |
87 | | | | | DM fw image | | | |
88 | | | | +-------------+ | | |
89 | | | | | +-----------+ | |
90 | | |---------|-----------------------|---->| Reset rls | | |
91 | | | | | +-----------+ | |
92 | | TIFS | | | : | |
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]93 | |Services | | | +-------------+ | |
94 | | |<--------|-----------------------|---->|*TF-A/OP-TEE*| | |
95 | | | | | +-------------+ | |
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]96 | | | | | : | |
97 | | | | | +-----------+ | |
98 | | |<--------|-----------------------|---->| *A72 SPL* | | |
99 | | | | | +-----------+ | |
100 | | | | | | Load | | |
101 | | | | | | u-boot.img| | |
102 | | | | | +-----------+ | |
103 | | | | | : | |
104 | | | | | +-----------+ | |
105 | | |<--------|-----------------------|---->| *U-Boot* | | |
106 | | | | | +-----------+ | |
107 | | | | | | prompt | | |
108 | | | | | +-----------+ | |
109 | | | | | | Load R5 | | |
110 | | | | | | Firmware | | |
111 | | | | | +-----------+ | |
112 | | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
113 | | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
114 | | | | | | Load C6 | | +-----------+ |
115 | | | | | | Firmware | | |
116 | | | | | +-----------+ | |
117 | | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
118 | | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
119 | | | | | | Load C7 | | +-----------+ |
120 | | | | | | Firmware | | |
121 | | | | | +-----------+ | |
122 | | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
123 | | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
124 | +---------+ | | | +-----------+ |
125 | | | | |
126 +------------------------------------------------------------------------+-----------------------+
127
128- Here DMSC acts as master and provides all the critical services. R5/A72
129 requests DMSC to get these services done as shown in the above diagram.
130
131Sources:
132--------
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]133
Nishanth Menonee91e482023-07-27 13:58:44 -0500[diff] [blame^]134.. include:: k3.rst
135 :start-after: .. k3_rst_include_start_boot_sources
136 :end-before: .. k3_rst_include_end_boot_sources
Andrew Davis4bb06452022-11-09 11:30:00 -0600[diff] [blame]137
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]138Build procedure:
139----------------
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]1401. Trusted Firmware-A:
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]141
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]142.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]143
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]144 $ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 \
145 TARGET_BOARD=generic SPD=opteed
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]146
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]1472. OP-TEE:
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]148
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]149.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]150
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]151 $ make PLATFORM=k3-j721e CFG_ARM64_core=y
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]152
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]1533. U-Boot:
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]154
155* 4.1 R5:
156
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]157.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]158
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]159 $ make j721e_evm_r5_defconfig
160 $ make CROSS_COMPILE=arm-linux-gnueabihf- \
161 BINMAN_INDIRS=<path/to/ti-linux-firmware>
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]162
163* 4.2 A72:
164
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]165.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]166
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]167 $ make j721e_evm_a72_defconfig
168 $ make CROSS_COMPILE=aarch64-linux-gnu- \
169 BL31=<path/to/trusted-firmware-a/dir>/build/k3/generic/release/bl31.bin \
170 TEE=<path/to/optee_os/dir>/out/arm-plat-k3/core/tee-raw.bin \
171 BINMAN_INDIRS=<path/to/ti-linux-firmware>
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]172
173Target Images
174--------------
Tom Rinifdf45032023-07-25 12:44:16 -0400[diff] [blame]175In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img.
176Each SoC variant (GP, HS-FS and HS-SE) requires a different source for these
177files.
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]178
179 - GP
180
181 * tiboot3-j721e-gp-evm.bin, sysfw-j721e-gp-evm.itb from step 4.1
182 * tispl.bin_unsigned, u-boot.img_unsigned from step 4.2
183
184 - HS-FS
185
186 * tiboot3-j721e_sr2-hs-fs-evm.bin, sysfw-j721e_sr2-hs-fs-evm.itb from step 4.1
187 * tispl.bin, u-boot.img from step 4.2
188
189 - HS-SE
190
191 * tiboot3-j721e_sr2-hs-evm.bin, sysfw-j721e_sr2-hs-evm.itb from step 4.1
192 * tispl.bin, u-boot.img from step 4.2
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]193
194Image formats:
195--------------
196
197- tiboot3.bin:
198
199.. code-block:: text
200
201 +-----------------------+
202 | X.509 |
203 | Certificate |
204 | +-------------------+ |
205 | | | |
206 | | R5 | |
207 | | u-boot-spl.bin | |
208 | | | |
209 | +-------------------+ |
210 | | | |
211 | | FIT header | |
212 | | +---------------+ | |
213 | | | | | |
214 | | | DTB 1...N | | |
215 | | +---------------+ | |
216 | +-------------------+ |
217 +-----------------------+
218
219- tispl.bin
220
221.. code-block:: text
222
223 +-----------------------+
224 | |
225 | FIT HEADER |
226 | +-------------------+ |
227 | | | |
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]228 | | A72 TF-A | |
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]229 | +-------------------+ |
230 | | | |
Neha Malcom Francis507be122023-07-22 00:14:43 +0530[diff] [blame]231 | | A72 OP-TEE | |
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]232 | +-------------------+ |
233 | | | |
234 | | R5 DM FW | |
235 | +-------------------+ |
236 | | | |
237 | | A72 SPL | |
238 | +-------------------+ |
239 | | | |
240 | | SPL DTB 1...N | |
241 | +-------------------+ |
242 +-----------------------+
243
244- sysfw.itb
245
246.. code-block:: text
247
248 +-----------------------+
249 | |
250 | FIT HEADER |
251 | +-------------------+ |
252 | | | |
253 | | sysfw.bin | |
254 | +-------------------+ |
255 | | | |
256 | | board config | |
257 | +-------------------+ |
258 | | | |
259 | | PM config | |
260 | +-------------------+ |
261 | | | |
262 | | RM config | |
263 | +-------------------+ |
264 | | | |
265 | | Secure config | |
266 | +-------------------+ |
267 +-----------------------+
268
Manorit Chawdhryc4188b92023-05-16 10:24:36 +0530[diff] [blame]269R5 Memory Map:
270--------------
271
272.. list-table::
273 :widths: 16 16 16
274 :header-rows: 1
275
276 * - Region
277 - Start Address
278 - End Address
279
280 * - SPL
281 - 0x41c00000
282 - 0x41c40000
283
284 * - EMPTY
285 - 0x41c40000
286 - 0x41c81920
287
288 * - STACK
289 - 0x41c85920
290 - 0x41c81920
291
292 * - Global data
293 - 0x41c859f0
294 - 0x41c85920
295
296 * - Heap
297 - 0x41c859f0
298 - 0x41cf59f0
299
300 * - BSS
301 - 0x41cf59f0
302 - 0x41cff9f0
303
304 * - MCU Scratchpad
305 - 0x41cff9fc
306 - 0x41cffbfc
307
308 * - ROM DATA
309 - 0x41cffbfc
310 - 0x41cfffff
311
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]312OSPI:
313-----
314ROM supports booting from OSPI from offset 0x0.
315
316Flashing images to OSPI:
317
318Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
319and sysfw.itb over tftp and then flash those to OSPI at their respective
320addresses.
321
322.. code-block:: text
323
324 => sf probe
325 => tftp ${loadaddr} tiboot3.bin
326 => sf update $loadaddr 0x0 $filesize
327 => tftp ${loadaddr} tispl.bin
328 => sf update $loadaddr 0x80000 $filesize
329 => tftp ${loadaddr} u-boot.img
330 => sf update $loadaddr 0x280000 $filesize
331 => tftp ${loadaddr} sysfw.itb
332 => sf update $loadaddr 0x6C0000 $filesize
333
334Flash layout for OSPI:
335
336.. code-block:: text
337
338 0x0 +----------------------------+
339 | ospi.tiboot3(512K) |
340 | |
341 0x80000 +----------------------------+
342 | ospi.tispl(2M) |
343 | |
344 0x280000 +----------------------------+
345 | ospi.u-boot(4M) |
346 | |
347 0x680000 +----------------------------+
348 | ospi.env(128K) |
349 | |
350 0x6A0000 +----------------------------+
351 | ospi.env.backup (128K) |
352 | |
353 0x6C0000 +----------------------------+
354 | ospi.sysfw(1M) |
355 | |
356 0x7C0000 +----------------------------+
357 | padding (256k) |
358 0x800000 +----------------------------+
359 | ospi.rootfs(UBIFS) |
360 | |
361 +----------------------------+
Kishon Vijay Abraham Idd7f5282021-07-21 21:28:49 +0530[diff] [blame]362
363Firmwares:
364----------
365
366The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
367The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured
368and controlled by the ethernet firmware that executes in the MAIN Cortex R5.
369The default supported environment variables support loading these firmwares
370from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load
371and start the remote cores in the system.
372
373J721E common processor board can be attached to a Ethernet QSGMII card and the
374PHY in the card has to be reset before it can be used for data transfer.
375"do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to
376configure this PHY.