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git01.mediatek.com / filogic / uboot / c4188b97c1afc8cd704fcce3911cf87759baa210 / . / doc / board / ti / j721e_evm.rst
blob: feaa2da5e9ac6fcb10c7fcbf73294664a86d3a08 [file] [log] [blame]
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]1.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
3
Bryan Brattlof10d3f172022-12-19 14:29:49 -0600[diff] [blame]4J721E Platforms
5===============
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]6
7Introduction:
8-------------
9The J721e family of SoCs are part of K3 Multicore SoC architecture platform
10targeting automotive applications. They are designed as a low power, high
11performance and highly integrated device architecture, adding significant
12enhancement on processing power, graphics capability, video and imaging
13processing, virtualization and coherent memory support.
14
15The device is partitioned into three functional domains, each containing
16specific processing cores and peripherals:
17
181. Wake-up (WKUP) domain:
19 * Device Management and Security Controller (DMSC)
20
212. Microcontroller (MCU) domain:
22 * Dual Core ARM Cortex-R5F processor
23
243. MAIN domain:
25 * Dual core 64-bit ARM Cortex-A72
26 * 2 x Dual cortex ARM Cortex-R5 subsystem
27 * 2 x C66x Digital signal processor sub system
28 * C71x Digital signal processor sub-system with MMA.
29
30More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
31
32Boot Flow:
33----------
34Boot flow is similar to that of AM65x SoC and extending it with remoteproc
35support. Below is the pictorial representation of boot flow:
36
37.. code-block:: text
38
39 +------------------------------------------------------------------------+-----------------------+
40 | DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
41 +------------------------------------------------------------------------+-----------------------+
42 | +--------+ | | | |
43 | | Reset | | | | |
44 | +--------+ | | | |
45 | : | | | |
46 | +--------+ | +-----------+ | | |
47 | | *ROM* |----------|-->| Reset rls | | | |
48 | +--------+ | +-----------+ | | |
49 | | | | : | | |
50 | | ROM | | : | | |
51 | |services| | : | | |
52 | | | | +-------------+ | | |
53 | | | | | *R5 ROM* | | | |
54 | | | | +-------------+ | | |
55 | | |<---------|---|Load and auth| | | |
56 | | | | | tiboot3.bin | | | |
57 | | | | +-------------+ | | |
58 | | | | : | | |
59 | | | | : | | |
60 | | | | : | | |
61 | | | | +-------------+ | | |
62 | | | | | *R5 SPL* | | | |
63 | | | | +-------------+ | | |
64 | | | | | Load | | | |
65 | | | | | sysfw.itb | | | |
66 | | Start | | +-------------+ | | |
67 | | System |<---------|---| Start | | | |
68 | |Firmware| | | SYSFW | | | |
69 | +--------+ | +-------------+ | | |
70 | : | | | | | |
71 | +---------+ | | Load | | | |
72 | | *SYSFW* | | | system | | | |
73 | +---------+ | | Config data | | | |
74 | | |<--------|---| | | | |
75 | | | | +-------------+ | | |
76 | | | | | DDR | | | |
77 | | | | | config | | | |
78 | | | | +-------------+ | | |
79 | | | | | Load | | | |
80 | | | | | tispl.bin | | | |
81 | | | | +-------------+ | | |
82 | | | | | Load R5 | | | |
83 | | | | | firmware | | | |
84 | | | | +-------------+ | | |
85 | | |<--------|---| Start A72 | | | |
86 | | | | | and jump to | | | |
87 | | | | | DM fw image | | | |
88 | | | | +-------------+ | | |
89 | | | | | +-----------+ | |
90 | | |---------|-----------------------|---->| Reset rls | | |
91 | | | | | +-----------+ | |
92 | | TIFS | | | : | |
93 | |Services | | | +-----------+ | |
94 | | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
95 | | | | | +-----------+ | |
96 | | | | | : | |
97 | | | | | +-----------+ | |
98 | | |<--------|-----------------------|---->| *A72 SPL* | | |
99 | | | | | +-----------+ | |
100 | | | | | | Load | | |
101 | | | | | | u-boot.img| | |
102 | | | | | +-----------+ | |
103 | | | | | : | |
104 | | | | | +-----------+ | |
105 | | |<--------|-----------------------|---->| *U-Boot* | | |
106 | | | | | +-----------+ | |
107 | | | | | | prompt | | |
108 | | | | | +-----------+ | |
109 | | | | | | Load R5 | | |
110 | | | | | | Firmware | | |
111 | | | | | +-----------+ | |
112 | | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
113 | | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
114 | | | | | | Load C6 | | +-----------+ |
115 | | | | | | Firmware | | |
116 | | | | | +-----------+ | |
117 | | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
118 | | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
119 | | | | | | Load C7 | | +-----------+ |
120 | | | | | | Firmware | | |
121 | | | | | +-----------+ | |
122 | | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
123 | | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
124 | +---------+ | | | +-----------+ |
125 | | | | |
126 +------------------------------------------------------------------------+-----------------------+
127
128- Here DMSC acts as master and provides all the critical services. R5/A72
129 requests DMSC to get these services done as shown in the above diagram.
130
131Sources:
132--------
1331. SYSFW:
134 Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
135 Branch: master
136
1372. ATF:
138 Tree: https://github.com/ARM-software/arm-trusted-firmware.git
139 Branch: master
140
1413. OPTEE:
142 Tree: https://github.com/OP-TEE/optee_os.git
143 Branch: master
144
Andrew Davis4bb06452022-11-09 11:30:00 -0600[diff] [blame]1454. DM Firmware:
146 Tree: git://git.ti.com/processor-firmware/ti-linux-firmware.git
147 Branch: ti-linux-firmware
148
1495. U-Boot:
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]150 Tree: https://source.denx.de/u-boot/u-boot
151 Branch: master
152
153Build procedure:
154----------------
1551. SYSFW:
156
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]157.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]158
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]159 make CROSS_COMPILE=arm-linux-gnueabihf- SOC=j721e
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]160
1612. ATF:
162
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]163.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]164
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]165 make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]166
1673. OPTEE:
168
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]169.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]170
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]171 make PLATFORM=k3-j721e CFG_ARM64_core=y
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]172
1734. U-Boot:
174
175* 4.1 R5:
176
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]177.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]178
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]179 make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=build/r5
180 make CROSS_COMPILE=arm-linux-gnueabihf- O=build/r5
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]181
182* 4.2 A72:
183
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]184.. code-block:: bash
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]185
Andrew Davisd8fcaa22022-11-09 11:30:01 -0600[diff] [blame]186 make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=build/a72
187 make CROSS_COMPILE=aarch64-linux-gnu- ATF=<ATF dir>/build/k3/generic/release/bl31.bin TEE=<OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin DM=<DM firmware>/ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f O=build/a72
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]188
189Target Images
190--------------
191Copy the below images to an SD card and boot:
192 - sysfw.itb from step 1
193 - tiboot3.bin from step 4.1
194 - tispl.bin, u-boot.img from 4.2
195
196Image formats:
197--------------
198
199- tiboot3.bin:
200
201.. code-block:: text
202
203 +-----------------------+
204 | X.509 |
205 | Certificate |
206 | +-------------------+ |
207 | | | |
208 | | R5 | |
209 | | u-boot-spl.bin | |
210 | | | |
211 | +-------------------+ |
212 | | | |
213 | | FIT header | |
214 | | +---------------+ | |
215 | | | | | |
216 | | | DTB 1...N | | |
217 | | +---------------+ | |
218 | +-------------------+ |
219 +-----------------------+
220
221- tispl.bin
222
223.. code-block:: text
224
225 +-----------------------+
226 | |
227 | FIT HEADER |
228 | +-------------------+ |
229 | | | |
230 | | A72 ATF | |
231 | +-------------------+ |
232 | | | |
233 | | A72 OPTEE | |
234 | +-------------------+ |
235 | | | |
236 | | R5 DM FW | |
237 | +-------------------+ |
238 | | | |
239 | | A72 SPL | |
240 | +-------------------+ |
241 | | | |
242 | | SPL DTB 1...N | |
243 | +-------------------+ |
244 +-----------------------+
245
246- sysfw.itb
247
248.. code-block:: text
249
250 +-----------------------+
251 | |
252 | FIT HEADER |
253 | +-------------------+ |
254 | | | |
255 | | sysfw.bin | |
256 | +-------------------+ |
257 | | | |
258 | | board config | |
259 | +-------------------+ |
260 | | | |
261 | | PM config | |
262 | +-------------------+ |
263 | | | |
264 | | RM config | |
265 | +-------------------+ |
266 | | | |
267 | | Secure config | |
268 | +-------------------+ |
269 +-----------------------+
270
Manorit Chawdhryc4188b92023-05-16 10:24:36 +0530[diff] [blame^]271R5 Memory Map:
272--------------
273
274.. list-table::
275 :widths: 16 16 16
276 :header-rows: 1
277
278 * - Region
279 - Start Address
280 - End Address
281
282 * - SPL
283 - 0x41c00000
284 - 0x41c40000
285
286 * - EMPTY
287 - 0x41c40000
288 - 0x41c81920
289
290 * - STACK
291 - 0x41c85920
292 - 0x41c81920
293
294 * - Global data
295 - 0x41c859f0
296 - 0x41c85920
297
298 * - Heap
299 - 0x41c859f0
300 - 0x41cf59f0
301
302 * - BSS
303 - 0x41cf59f0
304 - 0x41cff9f0
305
306 * - MCU Scratchpad
307 - 0x41cff9fc
308 - 0x41cffbfc
309
310 * - ROM DATA
311 - 0x41cffbfc
312 - 0x41cfffff
313
Kishon Vijay Abraham I78d13c92021-07-21 21:28:48 +0530[diff] [blame]314OSPI:
315-----
316ROM supports booting from OSPI from offset 0x0.
317
318Flashing images to OSPI:
319
320Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
321and sysfw.itb over tftp and then flash those to OSPI at their respective
322addresses.
323
324.. code-block:: text
325
326 => sf probe
327 => tftp ${loadaddr} tiboot3.bin
328 => sf update $loadaddr 0x0 $filesize
329 => tftp ${loadaddr} tispl.bin
330 => sf update $loadaddr 0x80000 $filesize
331 => tftp ${loadaddr} u-boot.img
332 => sf update $loadaddr 0x280000 $filesize
333 => tftp ${loadaddr} sysfw.itb
334 => sf update $loadaddr 0x6C0000 $filesize
335
336Flash layout for OSPI:
337
338.. code-block:: text
339
340 0x0 +----------------------------+
341 | ospi.tiboot3(512K) |
342 | |
343 0x80000 +----------------------------+
344 | ospi.tispl(2M) |
345 | |
346 0x280000 +----------------------------+
347 | ospi.u-boot(4M) |
348 | |
349 0x680000 +----------------------------+
350 | ospi.env(128K) |
351 | |
352 0x6A0000 +----------------------------+
353 | ospi.env.backup (128K) |
354 | |
355 0x6C0000 +----------------------------+
356 | ospi.sysfw(1M) |
357 | |
358 0x7C0000 +----------------------------+
359 | padding (256k) |
360 0x800000 +----------------------------+
361 | ospi.rootfs(UBIFS) |
362 | |
363 +----------------------------+
Kishon Vijay Abraham Idd7f5282021-07-21 21:28:49 +0530[diff] [blame]364
365Firmwares:
366----------
367
368The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
369The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured
370and controlled by the ethernet firmware that executes in the MAIN Cortex R5.
371The default supported environment variables support loading these firmwares
372from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load
373and start the remote cores in the system.
374
375J721E common processor board can be attached to a Ethernet QSGMII card and the
376PHY in the card has to be reset before it can be used for data transfer.
377"do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to
378configure this PHY.