Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <errno.h> |
| 9 | #include <asm/io.h> |
Bin Meng | 07793c08 | 2015-10-11 21:37:42 -0700 | [diff] [blame] | 10 | #include <asm/mrccache.h> |
Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 11 | #include <asm/post.h> |
| 12 | #include <asm/processor.h> |
| 13 | #include <asm/fsp/fsp_support.h> |
| 14 | |
Simon Glass | daa93d9 | 2015-07-31 09:31:31 -0600 | [diff] [blame] | 15 | DECLARE_GLOBAL_DATA_PTR; |
| 16 | |
Simon Glass | ee7c36f | 2017-03-28 10:27:30 -0600 | [diff] [blame^] | 17 | int checkcpu(void) |
| 18 | { |
| 19 | return 0; |
| 20 | } |
| 21 | |
Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 22 | int print_cpuinfo(void) |
| 23 | { |
| 24 | post_code(POST_CPU_INFO); |
| 25 | return default_print_cpuinfo(); |
| 26 | } |
| 27 | |
Simon Glass | fa91273 | 2015-08-10 07:05:07 -0600 | [diff] [blame] | 28 | int fsp_init_phase_pci(void) |
Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 29 | { |
| 30 | u32 status; |
| 31 | |
| 32 | /* call into FspNotify */ |
| 33 | debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); |
| 34 | status = fsp_notify(NULL, INIT_PHASE_PCI); |
Simon Glass | fa91273 | 2015-08-10 07:05:07 -0600 | [diff] [blame] | 35 | if (status) |
Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 36 | debug("fail, error code %x\n", status); |
| 37 | else |
| 38 | debug("OK\n"); |
| 39 | |
Simon Glass | fa91273 | 2015-08-10 07:05:07 -0600 | [diff] [blame] | 40 | return status ? -EPERM : 0; |
| 41 | } |
| 42 | |
Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 43 | void board_final_cleanup(void) |
| 44 | { |
| 45 | u32 status; |
| 46 | |
| 47 | /* call into FspNotify */ |
| 48 | debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); |
| 49 | status = fsp_notify(NULL, INIT_PHASE_BOOT); |
Simon Glass | 3825229 | 2015-08-12 19:33:07 -0600 | [diff] [blame] | 50 | if (status) |
Simon Glass | 509805b | 2015-01-27 22:13:39 -0700 | [diff] [blame] | 51 | debug("fail, error code %x\n", status); |
| 52 | else |
| 53 | debug("OK\n"); |
| 54 | |
| 55 | return; |
| 56 | } |
Bin Meng | d560c5c | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 57 | |
Bin Meng | 07793c08 | 2015-10-11 21:37:42 -0700 | [diff] [blame] | 58 | static __maybe_unused void *fsp_prepare_mrc_cache(void) |
| 59 | { |
| 60 | struct mrc_data_container *cache; |
| 61 | struct mrc_region entry; |
| 62 | int ret; |
| 63 | |
| 64 | ret = mrccache_get_region(NULL, &entry); |
| 65 | if (ret) |
| 66 | return NULL; |
| 67 | |
| 68 | cache = mrccache_find_current(&entry); |
| 69 | if (!cache) |
| 70 | return NULL; |
| 71 | |
| 72 | debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__, |
| 73 | cache->data, cache->data_size, cache->checksum); |
| 74 | |
| 75 | return cache->data; |
| 76 | } |
| 77 | |
Simon Glass | 295c423 | 2017-03-28 10:27:18 -0600 | [diff] [blame] | 78 | int arch_fsp_init(void) |
Bin Meng | d560c5c | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 79 | { |
Bin Meng | 07793c08 | 2015-10-11 21:37:42 -0700 | [diff] [blame] | 80 | void *nvs; |
| 81 | |
Bin Meng | 12440cd | 2015-08-20 06:40:19 -0700 | [diff] [blame] | 82 | if (!gd->arch.hob_list) { |
Bin Meng | 07793c08 | 2015-10-11 21:37:42 -0700 | [diff] [blame] | 83 | #ifdef CONFIG_ENABLE_MRC_CACHE |
| 84 | nvs = fsp_prepare_mrc_cache(); |
| 85 | #else |
| 86 | nvs = NULL; |
| 87 | #endif |
Bin Meng | 12440cd | 2015-08-20 06:40:19 -0700 | [diff] [blame] | 88 | /* |
| 89 | * The first time we enter here, call fsp_init(). |
| 90 | * Note the execution does not return to this function, |
| 91 | * instead it jumps to fsp_continue(). |
| 92 | */ |
Bin Meng | 07793c08 | 2015-10-11 21:37:42 -0700 | [diff] [blame] | 93 | fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs); |
Bin Meng | 12440cd | 2015-08-20 06:40:19 -0700 | [diff] [blame] | 94 | } else { |
| 95 | /* |
| 96 | * The second time we enter here, adjust the size of malloc() |
| 97 | * pool before relocation. Given gd->malloc_base was adjusted |
Albert ARIBAUD | 6cb4c46 | 2015-11-25 17:56:32 +0100 | [diff] [blame] | 98 | * after the call to board_init_f_init_reserve() in arch/x86/ |
| 99 | * cpu/start.S, we should fix up gd->malloc_limit here. |
Bin Meng | 12440cd | 2015-08-20 06:40:19 -0700 | [diff] [blame] | 100 | */ |
| 101 | gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN; |
| 102 | } |
Bin Meng | d560c5c | 2015-06-07 11:33:14 +0800 | [diff] [blame] | 103 | |
| 104 | return 0; |
| 105 | } |