blob: f668259c0e39fae605e7185c1e6d9c6a6bb9f968 [file] [log] [blame]
Simon Glass509805b2015-01-27 22:13:39 -07001/*
2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <errno.h>
9#include <asm/io.h>
10#include <asm/post.h>
11#include <asm/processor.h>
12#include <asm/fsp/fsp_support.h>
13
14int print_cpuinfo(void)
15{
16 post_code(POST_CPU_INFO);
17 return default_print_cpuinfo();
18}
19
20void reset_cpu(ulong addr)
21{
22 /* cold reset */
23 outb(0x06, PORT_RESET);
24}
25
26
27int board_pci_post_scan(struct pci_controller *hose)
28{
29 u32 status;
30
31 /* call into FspNotify */
32 debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
33 status = fsp_notify(NULL, INIT_PHASE_PCI);
34 if (status != FSP_SUCCESS)
35 debug("fail, error code %x\n", status);
36 else
37 debug("OK\n");
38
39 return 0;
40}
41
42void board_final_cleanup(void)
43{
44 u32 status;
45
46 /* call into FspNotify */
47 debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
48 status = fsp_notify(NULL, INIT_PHASE_BOOT);
49 if (status != FSP_SUCCESS)
50 debug("fail, error code %x\n", status);
51 else
52 debug("OK\n");
53
54 return;
55}