blob: adb574e8f1331e0e4d168fd76a228bb3503cb39d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chandan Nath4ba33452011-10-14 02:58:23 +00002/*
3 * clocks_am33xx.h
4 *
5 * AM33xx clock define
6 *
Nishanth Menoneaa39c62023-11-01 15:56:03 -05007 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
Chandan Nath4ba33452011-10-14 02:58:23 +00008 */
9
10#ifndef _CLOCKS_AM33XX_H_
11#define _CLOCKS_AM33XX_H_
12
Tom Rini52437072013-08-30 16:28:46 -040013/* MAIN PLL Fdll supported frequencies */
14#define MPUPLL_M_1000 1000
15#define MPUPLL_M_800 800
16#define MPUPLL_M_720 720
17#define MPUPLL_M_600 600
Lokesh Vutla1bda3732017-05-05 12:59:08 +053018#define MPUPLL_M_500 500
Tom Rini52437072013-08-30 16:28:46 -040019#define MPUPLL_M_300 300
20
Heiko Schocherb21f2ac2013-07-30 10:48:54 +053021#define UART_RESET (0x1 << 1)
22#define UART_CLK_RUNNING_MASK 0x1
23#define UART_SMART_IDLE_EN (0x1 << 0x3)
24
Lokesh Vutlaa82d4e12013-12-10 15:02:22 +053025#define CM_DLL_CTRL_NO_OVERRIDE 0x0
26#define CM_DLL_READYST 0x4
27
Lokesh Vutla6302e532017-05-05 12:59:10 +053028#define NUM_OPPS 6
29
Matt Porter57da6662013-03-15 10:07:04 +000030extern void enable_dmm_clocks(void);
Tom Rinifbb25522017-05-16 14:46:35 -040031extern void enable_emif_clocks(void);
Steve Kipisz5adac352013-08-14 10:51:31 -040032extern const struct dpll_params dpll_core_opp100;
33extern struct dpll_params dpll_mpu_opp100;
Chandan Nath4ba33452011-10-14 02:58:23 +000034
35#endif /* endif _CLOCKS_AM33XX_H_ */