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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
maxims@google.comf57bd002017-01-18 13:44:55 -08002/*
3 * Copyright 2016 Google Inc.
maxims@google.comf57bd002017-01-18 13:44:55 -08004 */
5
maxims@google.comf57bd002017-01-18 13:44:55 -08006#include <dm.h>
7#include <errno.h>
8#include <timer.h>
9#include <asm/io.h>
10#include <asm/arch/timer.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070011#include <linux/err.h>
maxims@google.comf57bd002017-01-18 13:44:55 -080012
maxims@google.comf57bd002017-01-18 13:44:55 -080013#define AST_TICK_TIMER 1
14#define AST_TMC_RELOAD_VAL 0xffffffff
15
16struct ast_timer_priv {
17 struct ast_timer *regs;
18 struct ast_timer_counter *tmc;
19};
20
21static struct ast_timer_counter *ast_get_timer_counter(struct ast_timer *timer,
22 int n)
23{
24 if (n > 3)
25 return &timer->timers2[n - 4];
26 else
27 return &timer->timers1[n - 1];
28}
29
30static int ast_timer_probe(struct udevice *dev)
31{
32 struct ast_timer_priv *priv = dev_get_priv(dev);
33 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
34
35 writel(AST_TMC_RELOAD_VAL, &priv->tmc->reload_val);
36
37 /*
38 * Stop the timer. This will also load reload_val into
39 * the status register.
40 */
41 clrbits_le32(&priv->regs->ctrl1,
42 AST_TMC_EN << AST_TMC_CTRL1_SHIFT(AST_TICK_TIMER));
43 /* Start the timer from the fixed 1MHz clock. */
44 setbits_le32(&priv->regs->ctrl1,
45 (AST_TMC_EN | AST_TMC_1MHZ) <<
46 AST_TMC_CTRL1_SHIFT(AST_TICK_TIMER));
47
48 uc_priv->clock_rate = AST_TMC_RATE;
49
50 return 0;
51}
52
Sean Anderson947fc2d2020-10-07 14:37:44 -040053static u64 ast_timer_get_count(struct udevice *dev)
maxims@google.comf57bd002017-01-18 13:44:55 -080054{
55 struct ast_timer_priv *priv = dev_get_priv(dev);
56
Sean Anderson947fc2d2020-10-07 14:37:44 -040057 return AST_TMC_RELOAD_VAL - readl(&priv->tmc->status);
maxims@google.comf57bd002017-01-18 13:44:55 -080058}
59
Simon Glassaad29ae2020-12-03 16:55:21 -070060static int ast_timer_of_to_plat(struct udevice *dev)
maxims@google.comf57bd002017-01-18 13:44:55 -080061{
62 struct ast_timer_priv *priv = dev_get_priv(dev);
63
Masahiro Yamada32822d02020-08-04 14:14:43 +090064 priv->regs = dev_read_addr_ptr(dev);
Ovidiu Panaita633f002020-08-03 22:17:35 +030065 if (!priv->regs)
66 return -EINVAL;
maxims@google.comf57bd002017-01-18 13:44:55 -080067
68 priv->tmc = ast_get_timer_counter(priv->regs, AST_TICK_TIMER);
69
70 return 0;
71}
72
73static const struct timer_ops ast_timer_ops = {
74 .get_count = ast_timer_get_count,
75};
76
77static const struct udevice_id ast_timer_ids[] = {
78 { .compatible = "aspeed,ast2500-timer" },
79 { .compatible = "aspeed,ast2400-timer" },
80 { }
81};
82
83U_BOOT_DRIVER(ast_timer) = {
84 .name = "ast_timer",
85 .id = UCLASS_TIMER,
86 .of_match = ast_timer_ids,
87 .probe = ast_timer_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -070088 .priv_auto = sizeof(struct ast_timer_priv),
Simon Glassaad29ae2020-12-03 16:55:21 -070089 .of_to_plat = ast_timer_of_to_plat,
maxims@google.comf57bd002017-01-18 13:44:55 -080090 .ops = &ast_timer_ops,
maxims@google.comf57bd002017-01-18 13:44:55 -080091};