Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2016 Google Inc. |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
| 8 | #include <errno.h> |
| 9 | #include <timer.h> |
| 10 | #include <asm/io.h> |
| 11 | #include <asm/arch/timer.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 12 | #include <linux/err.h> |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 13 | |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 14 | #define AST_TICK_TIMER 1 |
| 15 | #define AST_TMC_RELOAD_VAL 0xffffffff |
| 16 | |
| 17 | struct ast_timer_priv { |
| 18 | struct ast_timer *regs; |
| 19 | struct ast_timer_counter *tmc; |
| 20 | }; |
| 21 | |
| 22 | static struct ast_timer_counter *ast_get_timer_counter(struct ast_timer *timer, |
| 23 | int n) |
| 24 | { |
| 25 | if (n > 3) |
| 26 | return &timer->timers2[n - 4]; |
| 27 | else |
| 28 | return &timer->timers1[n - 1]; |
| 29 | } |
| 30 | |
| 31 | static int ast_timer_probe(struct udevice *dev) |
| 32 | { |
| 33 | struct ast_timer_priv *priv = dev_get_priv(dev); |
| 34 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
| 35 | |
| 36 | writel(AST_TMC_RELOAD_VAL, &priv->tmc->reload_val); |
| 37 | |
| 38 | /* |
| 39 | * Stop the timer. This will also load reload_val into |
| 40 | * the status register. |
| 41 | */ |
| 42 | clrbits_le32(&priv->regs->ctrl1, |
| 43 | AST_TMC_EN << AST_TMC_CTRL1_SHIFT(AST_TICK_TIMER)); |
| 44 | /* Start the timer from the fixed 1MHz clock. */ |
| 45 | setbits_le32(&priv->regs->ctrl1, |
| 46 | (AST_TMC_EN | AST_TMC_1MHZ) << |
| 47 | AST_TMC_CTRL1_SHIFT(AST_TICK_TIMER)); |
| 48 | |
| 49 | uc_priv->clock_rate = AST_TMC_RATE; |
| 50 | |
| 51 | return 0; |
| 52 | } |
| 53 | |
Sean Anderson | 947fc2d | 2020-10-07 14:37:44 -0400 | [diff] [blame] | 54 | static u64 ast_timer_get_count(struct udevice *dev) |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 55 | { |
| 56 | struct ast_timer_priv *priv = dev_get_priv(dev); |
| 57 | |
Sean Anderson | 947fc2d | 2020-10-07 14:37:44 -0400 | [diff] [blame] | 58 | return AST_TMC_RELOAD_VAL - readl(&priv->tmc->status); |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 59 | } |
| 60 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame^] | 61 | static int ast_timer_of_to_plat(struct udevice *dev) |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 62 | { |
| 63 | struct ast_timer_priv *priv = dev_get_priv(dev); |
| 64 | |
Masahiro Yamada | 32822d0 | 2020-08-04 14:14:43 +0900 | [diff] [blame] | 65 | priv->regs = dev_read_addr_ptr(dev); |
Ovidiu Panait | a633f00 | 2020-08-03 22:17:35 +0300 | [diff] [blame] | 66 | if (!priv->regs) |
| 67 | return -EINVAL; |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 68 | |
| 69 | priv->tmc = ast_get_timer_counter(priv->regs, AST_TICK_TIMER); |
| 70 | |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | static const struct timer_ops ast_timer_ops = { |
| 75 | .get_count = ast_timer_get_count, |
| 76 | }; |
| 77 | |
| 78 | static const struct udevice_id ast_timer_ids[] = { |
| 79 | { .compatible = "aspeed,ast2500-timer" }, |
| 80 | { .compatible = "aspeed,ast2400-timer" }, |
| 81 | { } |
| 82 | }; |
| 83 | |
| 84 | U_BOOT_DRIVER(ast_timer) = { |
| 85 | .name = "ast_timer", |
| 86 | .id = UCLASS_TIMER, |
| 87 | .of_match = ast_timer_ids, |
| 88 | .probe = ast_timer_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 89 | .priv_auto = sizeof(struct ast_timer_priv), |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame^] | 90 | .of_to_plat = ast_timer_of_to_plat, |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 91 | .ops = &ast_timer_ops, |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 92 | }; |