| Fabio Estevam | ebc8fcc | 2019-12-09 10:43:03 -0300 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // |
| 3 | // Copyright 2019 NXP |
| 4 | // Author: Fabio Estevam <fabio.estevam@nxp.com> |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "imx7ulp.dtsi" |
| 9 | |
| 10 | / { |
| 11 | model = "Embedded Artists i.MX7ULP COM"; |
| 12 | compatible = "ea,imx7ulp-com", "fsl,imx7ulp"; |
| 13 | |
| 14 | chosen { |
| 15 | stdout-path = &lpuart4; |
| 16 | }; |
| 17 | |
| 18 | memory { |
| 19 | device_type = "memory"; |
| 20 | reg = <0x60000000 0x8000000>; |
| 21 | }; |
| 22 | }; |
| 23 | |
| 24 | &lpuart4 { |
| 25 | pinctrl-names = "default"; |
| 26 | pinctrl-0 = <&pinctrl_lpuart4>; |
| 27 | status = "okay"; |
| 28 | }; |
| 29 | |
| 30 | &usbotg1 { |
| 31 | pinctrl-names = "default"; |
| 32 | pinctrl-0 = <&pinctrl_usbotg1_id>; |
| 33 | srp-disable; |
| 34 | hnp-disable; |
| 35 | adp-disable; |
| 36 | status = "okay"; |
| 37 | }; |
| 38 | |
| 39 | &usbphy1 { |
| 40 | fsl,tx-d-cal = <88>; |
| 41 | }; |
| 42 | |
| 43 | &usdhc0 { |
| 44 | pinctrl-names = "default"; |
| 45 | pinctrl-0 = <&pinctrl_usdhc0>; |
| 46 | non-removable; |
| 47 | bus-width = <8>; |
| 48 | no-1-8-v; |
| 49 | status = "okay"; |
| 50 | }; |
| 51 | |
| 52 | &iomuxc1 { |
| 53 | pinctrl-names = "default"; |
| 54 | pinctrl-0 = <&pinctrl_hog_1>; |
| 55 | |
| 56 | pinctrl_hog_1: hoggrp-1 { |
| 57 | fsl,pins = < |
| 58 | IMX7ULP_PAD_PTC1__PTC1 0x20000 |
| 59 | >; |
| 60 | }; |
| 61 | |
| 62 | pinctrl_lpuart4: lpuart4grp { |
| 63 | fsl,pins = < |
| 64 | IMX7ULP_PAD_PTC3__LPUART4_RX 0x3 |
| 65 | IMX7ULP_PAD_PTC2__LPUART4_TX 0x3 |
| 66 | >; |
| 67 | }; |
| 68 | |
| 69 | pinctrl_usdhc0: usdhc0grp { |
| 70 | fsl,pins = < |
| 71 | IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43 |
| 72 | IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042 |
| 73 | IMX7ULP_PAD_PTD3__SDHC0_D7 0x43 |
| 74 | IMX7ULP_PAD_PTD4__SDHC0_D6 0x43 |
| 75 | IMX7ULP_PAD_PTD5__SDHC0_D5 0x43 |
| 76 | IMX7ULP_PAD_PTD6__SDHC0_D4 0x43 |
| 77 | IMX7ULP_PAD_PTD7__SDHC0_D3 0x43 |
| 78 | IMX7ULP_PAD_PTD8__SDHC0_D2 0x43 |
| 79 | IMX7ULP_PAD_PTD9__SDHC0_D1 0x43 |
| 80 | IMX7ULP_PAD_PTD10__SDHC0_D0 0x43 |
| 81 | IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42 |
| 82 | >; |
| 83 | }; |
| 84 | |
| 85 | pinctrl_usbotg1_id: otg1idgrp { |
| 86 | fsl,pins = < |
| 87 | IMX7ULP_PAD_PTC13__USB0_ID 0x10003 |
| 88 | >; |
| 89 | }; |
| 90 | }; |