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git01.mediatek.com / filogic / uboot / ebb239a78a0fca9b871e148a7a1d9f7c29267671 / . / arch / x86 / cpu / start16.S
blob: 54f4ff6662a8d8999311be3e7553882b1b245c2a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]2/*
Bin Meng65db0c92015-01-20 11:25:44 +0800[diff] [blame]3 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]4 *
Graeme Russ45fc1d82011-04-13 19:43:26 +1000[diff] [blame]5 * (C) Copyright 2008-2011
6 * Graeme Russ, <graeme.russ@gmail.com>
7 *
8 * (C) Copyright 2002,2003
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +0200[diff] [blame]9 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]10 */
11
Graeme Russ80ccbac2010-10-07 20:03:30 +1100[diff] [blame]12#include <asm/global_data.h>
Graeme Russ93efcb22011-02-12 15:11:32 +1100[diff] [blame]13#include <asm/processor-flags.h>
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]14
15#define BOOT_SEG 0xffff0000 /* linear segment of boot code */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]16
17.section .start16, "ax"
18.code16
19.globl start16
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]20start16:
Simon Glass1f4476c2014-11-06 13:20:10 -0700[diff] [blame]21 /* Save BIST */
22 movl %eax, %ecx
23
Simon Glass727c4142014-11-06 13:20:03 -0700[diff] [blame]24 xorl %eax, %eax
Bin Meng65db0c92015-01-20 11:25:44 +0800[diff] [blame]25 movl %eax, %cr3 /* Invalidate TLB */
Simon Glass727c4142014-11-06 13:20:03 -0700[diff] [blame]26
Simon Glasscbfd7ff2014-11-06 13:20:01 -0700[diff] [blame]27 /* Turn off cache (this might require a 486-class CPU) */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]28 movl %cr0, %eax
Ondrej Kupka19c114a2011-09-30 21:05:11 +1100[diff] [blame]29 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]30 movl %eax, %cr0
Andy Shevchenkof3514a62020-02-17 17:30:12 +0200[diff] [blame]31 wbinvd
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]32
Graeme Russ59da5a52010-04-24 00:05:43 +1000[diff] [blame]33 /* load the temporary Global Descriptor Table */
Masahiro Yamada19f2a6d2019-12-03 14:20:49 +0900[diff] [blame]34data32 cs lidt idt_ptr
35data32 cs lgdt gdt_ptr
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]36
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]37 /* Now, we enter protected mode */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]38 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +1100[diff] [blame]39 orl $X86_CR0_PE, %eax
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]40 movl %eax, %cr0
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]41
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]42 /* Flush the prefetch queue */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]43 jmp ff
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]44ff:
Simon Glass1f4476c2014-11-06 13:20:10 -0700[diff] [blame]45
Bin Meng65db0c92015-01-20 11:25:44 +0800[diff] [blame]46 /* Finally restore BIST and jump to the 32-bit initialization code */
Simon Glass1f4476c2014-11-06 13:20:10 -0700[diff] [blame]47 movl %ecx, %eax
Masahiro Yamada80f283b2019-12-03 14:28:58 +0900[diff] [blame]48data32 cs ljmp *code32start
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]49
50 /* 48-bit far pointer */
51code32start:
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]52 .long _start /* offset */
53 .word 0x10 /* segment */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]54
Graeme Russ4fdcc422010-08-22 16:25:59 +1000[diff] [blame]55idt_ptr:
56 .word 0 /* limit */
57 .long 0 /* base */
58
Bin Meng65db0c92015-01-20 11:25:44 +0800[diff] [blame]59 /*
60 * The following Global Descriptor Table is just enough to get us into
61 * 'Flat Protected Mode' - It will be discarded as soon as the final
62 * GDT is setup in a safe location in RAM
63 */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]64gdt_ptr:
Bin Meng0f39bc02014-10-16 22:58:35 +0800[diff] [blame]65 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
Bin Menga3c9fb02015-06-07 11:33:13 +0800[diff] [blame]66 .long BOOT_SEG + gdt_rom /* base */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]67
Bin Meng65db0c92015-01-20 11:25:44 +0800[diff] [blame]68 /* Some CPUs are picky about GDT alignment... */
69 .align 16
Bin Menga3c9fb02015-06-07 11:33:13 +0800[diff] [blame]70.globl gdt_rom
71gdt_rom:
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]72 /*
73 * The GDT table ...
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]74 *
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]75 * Selector Type
76 * 0x00 NULL
77 * 0x08 Unused
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]78 * 0x10 32bit code
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]79 * 0x18 32bit data/stack
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]80 */
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]81 /* The NULL Desciptor - Mandatory */
82 .word 0x0000 /* limit_low */
83 .word 0x0000 /* base_low */
84 .byte 0x00 /* base_middle */
85 .byte 0x00 /* access */
86 .byte 0x00 /* flags + limit_high */
87 .byte 0x00 /* base_high */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]88
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]89 /* Unused Desciptor - (matches Linux) */
90 .word 0x0000 /* limit_low */
91 .word 0x0000 /* base_low */
92 .byte 0x00 /* base_middle */
93 .byte 0x00 /* access */
94 .byte 0x00 /* flags + limit_high */
95 .byte 0x00 /* base_high */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]96
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]97 /*
98 * The Code Segment Descriptor:
99 * - Base = 0x00000000
100 * - Size = 4GB
101 * - Access = Present, Ring 0, Exec (Code), Readable
102 * - Flags = 4kB Granularity, 32-bit
103 */
104 .word 0xffff /* limit_low */
105 .word 0x0000 /* base_low */
106 .byte 0x00 /* base_middle */
107 .byte 0x9b /* access */
108 .byte 0xcf /* flags + limit_high */
109 .byte 0x00 /* base_high */
wdenk591dda52002-11-18 00:14:45 +0000[diff] [blame]110
Graeme Russaf3f2c82011-12-19 14:26:18 +1100[diff] [blame]111 /*
112 * The Data Segment Descriptor:
113 * - Base = 0x00000000
114 * - Size = 4GB
115 * - Access = Present, Ring 0, Non-Exec (Data), Writable
116 * - Flags = 4kB Granularity, 32-bit
117 */
118 .word 0xffff /* limit_low */
119 .word 0x0000 /* base_low */
120 .byte 0x00 /* base_middle */
121 .byte 0x93 /* access */
122 .byte 0xcf /* flags + limit_high */
123 .byte 0x00 /* base_high */